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| author | Brian Cain <bcain@quicinc.com> | 2024-08-26 17:26:31 -0700 |
|---|---|---|
| committer | Brian Cain <brian.cain@oss.qualcomm.com> | 2024-12-12 21:43:49 -0600 |
| commit | f0db9f5759372d56d65cfb2d05b03285789468bf (patch) | |
| tree | d1aa99a1796e33c6f988642fbe6ed9b68da32214 | |
| parent | eed3f358796791dbd065a69adf85ee4a588d3981 (diff) | |
| download | focaccia-qemu-f0db9f5759372d56d65cfb2d05b03285789468bf.tar.gz focaccia-qemu-f0db9f5759372d56d65cfb2d05b03285789468bf.zip | |
target/hexagon: add enums for event, cause
Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
| -rw-r--r-- | target/hexagon/cpu_bits.h | 24 |
1 files changed, 15 insertions, 9 deletions
diff --git a/target/hexagon/cpu_bits.h b/target/hexagon/cpu_bits.h index 2e60c0fafe..ff596e2a94 100644 --- a/target/hexagon/cpu_bits.h +++ b/target/hexagon/cpu_bits.h @@ -23,15 +23,21 @@ #define PCALIGN 4 #define PCALIGN_MASK (PCALIGN - 1) -#define HEX_EVENT_TRAP0 0x008 - -#define HEX_CAUSE_TRAP0 0x172 -#define HEX_CAUSE_FETCH_NO_UPAGE 0x012 -#define HEX_CAUSE_INVALID_PACKET 0x015 -#define HEX_CAUSE_INVALID_OPCODE 0x015 -#define HEX_CAUSE_PC_NOT_ALIGNED 0x01e -#define HEX_CAUSE_PRIV_NO_UREAD 0x024 -#define HEX_CAUSE_PRIV_NO_UWRITE 0x025 +enum hex_event { + HEX_EVENT_NONE = -1, + HEX_EVENT_TRAP0 = 0x008, +}; + +enum hex_cause { + HEX_CAUSE_NONE = -1, + HEX_CAUSE_TRAP0 = 0x172, + HEX_CAUSE_FETCH_NO_UPAGE = 0x012, + HEX_CAUSE_INVALID_PACKET = 0x015, + HEX_CAUSE_INVALID_OPCODE = 0x015, + HEX_CAUSE_PC_NOT_ALIGNED = 0x01e, + HEX_CAUSE_PRIV_NO_UREAD = 0x024, + HEX_CAUSE_PRIV_NO_UWRITE = 0x025, +}; #define PACKET_WORDS_MAX 4 |