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| author | Bibo Mao <maobibo@loongson.cn> | 2024-09-18 14:43:10 +0800 |
|---|---|---|
| committer | Bibo Mao <maobibo@loongson.cn> | 2024-12-19 15:23:29 +0800 |
| commit | f58ac9784728e27b096f4d0086f5277a7bef01f4 (patch) | |
| tree | 4bbb3cf7b64ab8f3263274dc8cf087a4aa48e056 | |
| parent | deeca9cb0ba8d8c85e2b8eeb778b35dd0b806d8c (diff) | |
| download | focaccia-qemu-f58ac9784728e27b096f4d0086f5277a7bef01f4.tar.gz focaccia-qemu-f58ac9784728e27b096f4d0086f5277a7bef01f4.zip | |
include: Move struct LoongArchPCHPIC to loongarch_pic_common header file
Move structure LoongArchPCHPIC from header file loongarch_pch_pic.h to file loongarch_pic_common.h, and rename structure name with LoongArchPICCommonState. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
| -rw-r--r-- | include/hw/intc/loongarch_pch_pic.h | 27 | ||||
| -rw-r--r-- | include/hw/intc/loongarch_pic_common.h | 28 |
2 files changed, 29 insertions, 26 deletions
diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h index 861b32313b..381accbf2b 100644 --- a/include/hw/intc/loongarch_pch_pic.h +++ b/include/hw/intc/loongarch_pch_pic.h @@ -10,34 +10,9 @@ #include "hw/intc/loongarch_pic_common.h" +#define LoongArchPCHPIC LoongArchPICCommonState #define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic" #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC) -struct LoongArchPCHPIC { - SysBusDevice parent_obj; - qemu_irq parent_irq[64]; - uint64_t int_mask; /*0x020 interrupt mask register*/ - uint64_t htmsi_en; /*0x040 1=msi*/ - uint64_t intedge; /*0x060 edge=1 level =0*/ - uint64_t intclr; /*0x080 for clean edge int,set 1 clean,set 0 is noused*/ - uint64_t auto_crtl0; /*0x0c0*/ - uint64_t auto_crtl1; /*0x0e0*/ - uint64_t last_intirr; /* edge detection */ - uint64_t intirr; /* 0x380 interrupt request register */ - uint64_t intisr; /* 0x3a0 interrupt service register */ - /* - * 0x3e0 interrupt level polarity selection - * register 0 for high level trigger - */ - uint64_t int_polarity; - - uint8_t route_entry[64]; /*0x100 - 0x138*/ - uint8_t htmsi_vector[64]; /*0x200 - 0x238*/ - - MemoryRegion iomem32_low; - MemoryRegion iomem32_high; - MemoryRegion iomem8; - unsigned int irq_num; -}; #endif /* HW_LOONGARCH_PCH_PIC_H */ diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h index 6d0e33e1ac..124bb7d226 100644 --- a/include/hw/intc/loongarch_pic_common.h +++ b/include/hw/intc/loongarch_pic_common.h @@ -39,4 +39,32 @@ #define STATUS_HI_START 0x4 #define POL_LO_START 0x40 #define POL_HI_START 0x44 + +struct LoongArchPICCommonState { + SysBusDevice parent_obj; + + qemu_irq parent_irq[64]; + uint64_t int_mask; /* 0x020 interrupt mask register */ + uint64_t htmsi_en; /* 0x040 1=msi */ + uint64_t intedge; /* 0x060 edge=1 level=0 */ + uint64_t intclr; /* 0x080 clean edge int, set 1 clean, 0 noused */ + uint64_t auto_crtl0; /* 0x0c0 */ + uint64_t auto_crtl1; /* 0x0e0 */ + uint64_t last_intirr; /* edge detection */ + uint64_t intirr; /* 0x380 interrupt request register */ + uint64_t intisr; /* 0x3a0 interrupt service register */ + /* + * 0x3e0 interrupt level polarity selection + * register 0 for high level trigger + */ + uint64_t int_polarity; + + uint8_t route_entry[64]; /* 0x100 - 0x138 */ + uint8_t htmsi_vector[64]; /* 0x200 - 0x238 */ + + MemoryRegion iomem32_low; + MemoryRegion iomem32_high; + MemoryRegion iomem8; + unsigned int irq_num; +}; #endif /* HW_LOONGARCH_PIC_COMMON_H */ |