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| author | Laurent Vivier <laurent@vivier.eu> | 2018-01-04 02:29:06 +0100 |
|---|---|---|
| committer | Laurent Vivier <laurent@vivier.eu> | 2018-01-04 17:24:35 +0100 |
| commit | f58ed1c50add3e76331afdc92387c0da9dd9e443 (patch) | |
| tree | 886d514d1f3c4ad5af433929f4ec4a104db6725b | |
| parent | 6ad257641d60f8c4a47972af9027b1c9bb5af787 (diff) | |
| download | focaccia-qemu-f58ed1c50add3e76331afdc92387c0da9dd9e443.tar.gz focaccia-qemu-f58ed1c50add3e76331afdc92387c0da9dd9e443.zip | |
target/m68k: add cpush/cinv
Add cache lines invalidate and cache lines push as no-op operations, as we don't have cache. These instructions are 68040 only. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180104012913.30763-11-laurent@vivier.eu>
| -rw-r--r-- | target/m68k/translate.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/target/m68k/translate.c b/target/m68k/translate.c index f77005215f..98efe6b976 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4496,6 +4496,24 @@ DISAS_INSN(cpushl) /* Cache push/invalidate. Implement as no-op. */ } +DISAS_INSN(cpush) +{ + if (IS_USER(s)) { + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + return; + } + /* Cache push/invalidate. Implement as no-op. */ +} + +DISAS_INSN(cinv) +{ + if (IS_USER(s)) { + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + return; + } + /* Invalidate cache line. Implement as no-op. */ +} + DISAS_INSN(wddata) { gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); @@ -5674,6 +5692,8 @@ void register_m68k_insns (CPUM68KState *env) INSN(fsave, f300, ffc0, FPU); INSN(intouch, f340, ffc0, CF_ISA_A); INSN(cpushl, f428, ff38, CF_ISA_A); + INSN(cpush, f420, ff20, M68040); + INSN(cinv, f400, ff20, M68040); INSN(wddata, fb00, ff00, CF_ISA_A); INSN(wdebug, fbc0, ffc0, CF_ISA_A); #endif |