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| author | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2019-11-06 14:26:53 +0100 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2019-11-12 16:35:26 +0100 |
| commit | f91c60f0cae9fc6c9ea823a6961c23acd96966b4 (patch) | |
| tree | cd7cd138da2c8253aced5ef4f5fc21513c3c072f | |
| parent | a6338015269443245f1f9f0eb3fcaf171a35765b (diff) | |
| download | focaccia-qemu-f91c60f0cae9fc6c9ea823a6961c23acd96966b4.tar.gz focaccia-qemu-f91c60f0cae9fc6c9ea823a6961c23acd96966b4.zip | |
target/microblaze: Plug temp leaks with delay slot setup
Plug temp leaks with delay slot setup. Reviewed-by: Luc Michel <luc.michel@greensocs.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
| -rw-r--r-- | target/microblaze/translate.c | 26 |
1 files changed, 14 insertions, 12 deletions
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index c8442b18e1..7b4b66a622 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -1177,6 +1177,17 @@ static void eval_cond_jmp(DisasContext *dc, TCGv_i64 pc_true, TCGv_i64 pc_false) tcg_temp_free_i64(tmp_zero); } +static void dec_setup_dslot(DisasContext *dc) +{ + TCGv_i32 tmp = tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)); + + dc->delayed_branch = 2; + dc->tb_flags |= D_FLAG; + + tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUMBState, bimm)); + tcg_temp_free_i32(tmp); +} + static void dec_bcc(DisasContext *dc) { unsigned int cc; @@ -1188,10 +1199,7 @@ static void dec_bcc(DisasContext *dc) dc->delayed_branch = 1; if (dslot) { - dc->delayed_branch = 2; - dc->tb_flags |= D_FLAG; - tcg_gen_st_i32(tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)), - cpu_env, offsetof(CPUMBState, bimm)); + dec_setup_dslot(dc); } if (dec_alu_op_b_is_small_imm(dc)) { @@ -1250,10 +1258,7 @@ static void dec_br(DisasContext *dc) dc->delayed_branch = 1; if (dslot) { - dc->delayed_branch = 2; - dc->tb_flags |= D_FLAG; - tcg_gen_st_i32(tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)), - cpu_env, offsetof(CPUMBState, bimm)); + dec_setup_dslot(dc); } if (link && dc->rd) tcg_gen_movi_i32(cpu_R[dc->rd], dc->pc); @@ -1355,10 +1360,7 @@ static void dec_rts(DisasContext *dc) return; } - dc->delayed_branch = 2; - dc->tb_flags |= D_FLAG; - tcg_gen_st_i32(tcg_const_i32(dc->type_b && (dc->tb_flags & IMM_FLAG)), - cpu_env, offsetof(CPUMBState, bimm)); + dec_setup_dslot(dc); if (i_bit) { LOG_DIS("rtid ir=%x\n", dc->ir); |