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| author | Rabin Vincent <rabin@rab.in> | 2010-02-15 00:02:34 +0530 |
|---|---|---|
| committer | Paul Brook <paul@codesourcery.com> | 2010-02-19 13:38:32 +0000 |
| commit | fa26df032ec3da7bf0db541e40b2ac1b19aea391 (patch) | |
| tree | 515f4b26ec8039a35ba1ca79dd4898e3e0403f15 | |
| parent | 24ebf5f31a178051cff1a4aab5ba621037191577 (diff) | |
| download | focaccia-qemu-fa26df032ec3da7bf0db541e40b2ac1b19aea391.tar.gz focaccia-qemu-fa26df032ec3da7bf0db541e40b2ac1b19aea391.zip | |
target-arm: fix thumb CPS
The Thumb CPS currently does not work correctly: CPSID touches more bits than the instruction wants to, and CPSIE does nothing. Fix it by passing the correct mask (the "affect" bits) and value. Signed-off-by: Rabin Vincent <rabin@rab.in>
| -rw-r--r-- | target-arm/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c index 786c3294da..10a516b909 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -8898,7 +8898,7 @@ static void disas_thumb_insn(CPUState *env, DisasContext *s) shift = CPSR_A | CPSR_I | CPSR_F; else shift = 0; - gen_set_psr_im(s, shift, 0, ((insn & 7) << 6) & shift); + gen_set_psr_im(s, ((insn & 7) << 6), 0, shift); } break; |