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| author | Tom Lendacky <thomas.lendacky@amd.com> | 2022-09-30 10:14:30 -0500 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2023-04-28 12:50:34 +0200 |
| commit | fb6bbafc0f19385fb257ee073ed13dcaf613f2f8 (patch) | |
| tree | adbd085044cb70a582e41400aa5aee76b214c314 | |
| parent | 8168fed9f84e3128f7628969ae78af49433d5ce7 (diff) | |
| download | focaccia-qemu-fb6bbafc0f19385fb257ee073ed13dcaf613f2f8.tar.gz focaccia-qemu-fb6bbafc0f19385fb257ee073ed13dcaf613f2f8.zip | |
i386/cpu: Update how the EBX register of CPUID 0x8000001F is set
Update the setting of CPUID 0x8000001F EBX to clearly document the ranges
associated with fields being set.
Fixes: 6cb8f2a663 ("cpu/i386: populate CPUID 0x8000_001F when SEV is active")
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Message-Id: <5822fd7d02b575121380e1f493a8f6d9eba2b11a.1664550870.git.thomas.lendacky@amd.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| -rw-r--r-- | target/i386/cpu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 2e30e348a1..73dd99374a 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6000,8 +6000,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, if (sev_enabled()) { *eax = 0x2; *eax |= sev_es_enabled() ? 0x8 : 0; - *ebx = sev_get_cbit_position(); - *ebx |= sev_get_reduced_phys_bits() << 6; + *ebx = sev_get_cbit_position() & 0x3f; /* EBX[5:0] */ + *ebx |= (sev_get_reduced_phys_bits() & 0x3f) << 6; /* EBX[11:6] */ } break; default: |