diff options
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-02-03 19:55:13 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-02-03 19:55:13 +0000 |
| commit | fce5ecb7808bee2858789c9e56cb3d3d16e9d37f (patch) | |
| tree | d48e04d0787b27d958aa9765f1a4e077917f2c7d | |
| parent | 9bdba1b67b93247382cfbdf8f06c6386d70e9287 (diff) | |
| download | focaccia-qemu-fce5ecb7808bee2858789c9e56cb3d3d16e9d37f.tar.gz focaccia-qemu-fce5ecb7808bee2858789c9e56cb3d3d16e9d37f.zip | |
Fix compilation of PPC64 targets with DEBUG_TCGV enabled
The attached patch fixes compilation of PPC64 targets with DEBUG_TCGV enabled. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6502 c046a42c-6fe2-441c-8c8c-71466251a162
| -rw-r--r-- | target-ppc/translate.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 1bbe7f5afd..1cc78cd9cd 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -6263,7 +6263,7 @@ GEN_HANDLER(mfvscr, 0x04, 0x2, 0x18, 0x001ff800, PPC_ALTIVEC) t = tcg_temp_new_i32(); tcg_gen_ld_i32(t, cpu_env, offsetof(CPUState, vscr)); tcg_gen_extu_i32_i64(cpu_avrl[rD(ctx->opcode)], t); - tcg_temp_free(t); + tcg_temp_free_i32(t); } GEN_HANDLER(mtvscr, 0x04, 0x2, 0x19, 0x03ff0000, PPC_ALTIVEC) @@ -6511,7 +6511,7 @@ GEN_VXFORM_UIMM(vspltw, 6, 10); GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC) { TCGv_ptr ra, rb, rd; - TCGv sh; + TCGv_i32 sh; if (unlikely(!ctx->altivec_enabled)) { gen_exception(ctx, POWERPC_EXCP_VPU); return; @@ -6524,7 +6524,7 @@ GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC) tcg_temp_free_ptr(ra); tcg_temp_free_ptr(rb); tcg_temp_free_ptr(rd); - tcg_temp_free(sh); + tcg_temp_free_i32(sh); } #define GEN_VAFORM_PAIRED(name0, name1, opc2) \ |