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| author | Laurent Vivier <laurent@vivier.eu> | 2017-01-13 19:36:29 +0100 |
|---|---|---|
| committer | Laurent Vivier <laurent@vivier.eu> | 2017-01-14 10:06:21 +0100 |
| commit | fe53c2be8c12da345bd788b949e0b2360e4b3db3 (patch) | |
| tree | fc7fbe8e510608140a15405b66c8fd6efa3a66d8 | |
| parent | 7b6de33e3032f33a9097665adf336c5c3a9eaea7 (diff) | |
| download | focaccia-qemu-fe53c2be8c12da345bd788b949e0b2360e4b3db3.tar.gz focaccia-qemu-fe53c2be8c12da345bd788b949e0b2360e4b3db3.zip | |
target-m68k: fix bit operation with immediate value
M680x0 bit operations with an immediate value use 9 bits of the 16bit value, while coldfire ones use only 8 bits. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <1484332593-16782-2-git-send-email-laurent@vivier.eu>
| -rw-r--r-- | target/m68k/translate.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 5f7357ebca..410f56a05a 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -1801,9 +1801,16 @@ DISAS_INSN(bitop_im) op = (insn >> 6) & 3; bitnum = read_im16(env, s); - if (bitnum & 0xff00) { - disas_undef(env, s, insn); - return; + if (m68k_feature(s->env, M68K_FEATURE_M68000)) { + if (bitnum & 0xfe00) { + disas_undef(env, s, insn); + return; + } + } else { + if (bitnum & 0xff00) { + disas_undef(env, s, insn); + return; + } } SRC_EA(env, src1, opsize, 0, op ? &addr: NULL); |