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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-11-26 18:54:23 -0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-01-17 10:08:55 -1000 |
| commit | 9da6079b2695dcffd8b18890db6cafdf4dc373db (patch) | |
| tree | 40f2a3e7c03b3dc10b3bc3a38aca0e8641cea3c4 /accel/tcg/cpu-exec.c | |
| parent | b7e4afbd9f2f9233a37e021f9e8cce472aecdd64 (diff) | |
| download | focaccia-qemu-9da6079b2695dcffd8b18890db6cafdf4dc373db.tar.gz focaccia-qemu-9da6079b2695dcffd8b18890db6cafdf4dc373db.zip | |
tcg: Add TranslationBlock.jmp_insn_offset
Stop overloading jmp_target_arg for both offset and address, depending on TCG_TARGET_HAS_direct_jump. Instead, add a new field to hold the jump insn offset and always set the target address in jmp_target_addr[]. This will allow a tcg backend to use either direct or indirect depending on displacement. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel/tcg/cpu-exec.c')
| -rw-r--r-- | accel/tcg/cpu-exec.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 8927092537..25c4b04445 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -572,14 +572,13 @@ void cpu_exec_step_atomic(CPUState *cpu) void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr) { + tb->jmp_target_addr[n] = addr; if (TCG_TARGET_HAS_direct_jump) { - uintptr_t offset = tb->jmp_target_arg[n]; + uintptr_t offset = tb->jmp_insn_offset[n]; uintptr_t tc_ptr = (uintptr_t)tb->tc.ptr; uintptr_t jmp_rx = tc_ptr + offset; uintptr_t jmp_rw = jmp_rx - tcg_splitwx_diff; tb_target_set_jmp_target(tc_ptr, jmp_rx, jmp_rw, addr); - } else { - tb->jmp_target_arg[n] = addr; } } |