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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-10-01 13:36:33 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2022-12-20 17:09:41 -0800 |
| commit | a97d5d2c8be2aec5b2e3c81cde33506b3c029033 (patch) | |
| tree | 7ebe1d4e77ba9dd9da1850aac687e66563fa154e /accel/tcg/translate-all.c | |
| parent | bf590a67dd7a92de89f5297fe87e48ad21f96194 (diff) | |
| download | focaccia-qemu-a97d5d2c8be2aec5b2e3c81cde33506b3c029033.tar.gz focaccia-qemu-a97d5d2c8be2aec5b2e3c81cde33506b3c029033.zip | |
accel/tcg: Use interval tree for TBs in user-only mode
Begin weaning user-only away from PageDesc. Since, for user-only, all TB (and page) manipulation is done with a single mutex, and there is no virtual/physical discontinuity to split a TB across discontinuous pages, place all of the TBs into a single IntervalTree. This makes it trivial to find all of the TBs intersecting a range. Retain the existing PageDesc + linked list implementation for system mode. Move the portion of the implementation that overlaps the new user-only code behind the common ifdef. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel/tcg/translate-all.c')
| -rw-r--r-- | accel/tcg/translate-all.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index ac3ee3740c..b964ea44d7 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -709,7 +709,7 @@ page_collection_lock(tb_page_addr_t start, tb_page_addr_t end) for (index = start; index <= end; index++) { TranslationBlock *tb; - int n; + PageForEachNext n; pd = page_find(index); if (pd == NULL) { @@ -720,7 +720,7 @@ page_collection_lock(tb_page_addr_t start, tb_page_addr_t end) goto retry; } assert_page_locked(pd); - PAGE_FOR_EACH_TB(pd, tb, n) { + PAGE_FOR_EACH_TB(unused, unused, pd, tb, n) { if (page_trylock_add(set, tb_page_addr0(tb)) || (tb_page_addr1(tb) != -1 && page_trylock_add(set, tb_page_addr1(tb)))) { |