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| author | Emilio G. Cota <cota@braap.org> | 2018-10-10 10:48:50 -0400 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2018-10-18 18:58:10 -0700 |
| commit | fff42f183ea4c3967405d4c1dce6d97dae4d64c8 (patch) | |
| tree | 5d68af55ddf42c9025133a17c0a21e318a47aaae /accel/tcg/translate-all.c | |
| parent | d7f425fdea991f052241c6479acd9feae834063b (diff) | |
| download | focaccia-qemu-fff42f183ea4c3967405d4c1dce6d97dae4d64c8.tar.gz focaccia-qemu-fff42f183ea4c3967405d4c1dce6d97dae4d64c8.zip | |
tcg: access cpu->icount_decr.u16.high with atomics
Consistently access u16.high with atomics to avoid undefined behaviour in MTTCG. Note that icount_decr.u16.low is only used in icount mode, so regular accesses to it are OK. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Message-Id: <20181010144853.13005-2-cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel/tcg/translate-all.c')
| -rw-r--r-- | accel/tcg/translate-all.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index ad5c758246..356dcd0948 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -2341,7 +2341,7 @@ void cpu_interrupt(CPUState *cpu, int mask) { g_assert(qemu_mutex_iothread_locked()); cpu->interrupt_request |= mask; - cpu->icount_decr.u16.high = -1; + atomic_set(&cpu->icount_decr.u16.high, -1); } /* |