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| author | Stefan Hajnoczi <stefanha@redhat.com> | 2022-09-06 07:31:43 -0400 |
|---|---|---|
| committer | Stefan Hajnoczi <stefanha@redhat.com> | 2022-09-06 07:31:43 -0400 |
| commit | b34b42f1b6a33c455dccce6ceb49962dddbb7a8a (patch) | |
| tree | 68143a8c84528fdd3caf8b5206a5df9427ae7263 /accel/tcg/user-exec.c | |
| parent | fd28528ece590dc709d1a893fce2ff2f68ddca70 (diff) | |
| parent | 00c07344fa245b22e895b363320ba4cd0ec1088a (diff) | |
| download | focaccia-qemu-b34b42f1b6a33c455dccce6ceb49962dddbb7a8a.tar.gz focaccia-qemu-b34b42f1b6a33c455dccce6ceb49962dddbb7a8a.zip | |
Merge tag 'pull-tcg-20220906' of https://gitlab.com/rth7680/qemu into staging
Respect PROT_EXEC in user-only mode. Fix s390x, i386 and riscv for translations crossing a page. # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmMW8TcdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8qfwf9EYjXywES/UYzfeJC # 7irryE3iYddWP+ix3Q4WKaTc61plwP5MMCmeq4PjRo1IBAL5dTtUE1+AFXkEvm4L # EckSiT5D5d/wYOfhWSWxjblmMk7GUXRRgKzkF1ir3soIftQgXdb43PwAswuOca/v # dX7wXBJOoWmGWqXNNlQmGIl7c4uQTkOM6iTTLlm4Qg7SJC4MA6EiSZmXlvAs80lN # TCbBV5P89qseHwzhJUTMZEO+ZMAuTSjFSd/RqBexVa4ty5UJxxgBk21A8JtQPUhr # Y/Ezb0yhOcwrdjJ8REc267BZbdNgbaVNlUd7c9GKbv8bQUh0AoM9gnjGdoID88x9 # q0f+Pw== # =HmJB # -----END PGP SIGNATURE----- # gpg: Signature made Tue 06 Sep 2022 03:05:27 EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20220906' of https://gitlab.com/rth7680/qemu: target/riscv: Make translator stop before the end of a page target/riscv: Add MAX_INSN_LEN and insn_len target/i386: Make translator stop before the end of a page target/s390x: Make translator stop before the end of a page accel/tcg: Add fast path for translator_ld* accel/tcg: Add pc and host_pc params to gen_intermediate_code accel/tcg: Remove translator_ldsw accel/tcg: Document the faulting lookup in tb_lookup_cmp accel/tcg: Use probe_access_internal for softmmu get_page_addr_code_hostp accel/tcg: Move qemu_ram_addr_from_host_nofail to physmem.c accel/tcg: Make tb_htable_lookup static accel/tcg: Unlock mmap_lock after longjmp accel/tcg: Properly implement get_page_addr_code for user-only accel/tcg: Introduce is_same_page() tests/tcg/i386: Move smc_code2 to an executable section linux-user: Clear translations on mprotect() linux-user: Honor PT_GNU_STACK linux-user/x86_64: Allocate vsyscall page as a commpage linux-user/hppa: Allocate page zero as a commpage linux-user/arm: Mark the commpage executable Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'accel/tcg/user-exec.c')
| -rw-r--r-- | accel/tcg/user-exec.c | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 20ada5472b..521aa8b61e 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -80,10 +80,7 @@ MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write) * (and if the translator doesn't handle page boundaries correctly * there's little we can do about that here). Therefore, do not * trigger the unwinder. - * - * Like tb_gen_code, release the memory lock before cpu_loop_exit. */ - mmap_unlock(); *pc = 0; return MMU_INST_FETCH; } @@ -199,6 +196,20 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size, return size ? g2h(env_cpu(env), addr) : NULL; } +tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong addr, + void **hostp) +{ + int flags; + + flags = probe_access_internal(env, addr, 1, MMU_INST_FETCH, false, 0); + g_assert(flags == 0); + + if (hostp) { + *hostp = g2h_untagged(addr); + } + return addr; +} + /* The softmmu versions of these helpers are in cputlb.c. */ /* |