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| author | Paolo Bonzini <pbonzini@redhat.com> | 2020-06-26 05:53:36 -0400 |
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| committer | Paolo Bonzini <pbonzini@redhat.com> | 2020-07-10 18:02:22 -0400 |
| commit | c0c8445255b2b5b440c355431c8b01b7b7b7c8cf (patch) | |
| tree | b591227a4b9c015ad804c6e0f7fdfcb3d9403aeb /arch_init.c | |
| parent | 6c9cce1ff348709869262e4bd15ad4fedf513f17 (diff) | |
| download | focaccia-qemu-c0c8445255b2b5b440c355431c8b01b7b7b7c8cf.tar.gz focaccia-qemu-c0c8445255b2b5b440c355431c8b01b7b7b7c8cf.zip | |
target/i386: implement undocumented "smsw r32" behavior
In 32-bit mode, the higher 16 bits of the destination register are undefined. In practice CR0[31:0] is stored, just like in 64-bit mode, so just remove the "if" that currently differentiates the behavior. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reported-by: Roman Bolshakov <r.bolshakov@yadro.com> Reviewed-by: Roman Bolshakov <r.bolshakov@yadro.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch_init.c')
0 files changed, 0 insertions, 0 deletions