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| author | Peter Maydell <peter.maydell@linaro.org> | 2016-12-27 16:44:58 +0000 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-12-27 16:44:58 +0000 |
| commit | 0f72559fbc9e1ae45aa8ebeed0443fe3a7a388a8 (patch) | |
| tree | 101db4671c93030b9cf3fd2035a5b938a5359855 /async.c | |
| parent | e5fdf663cf01f824f0e29701551a2c29554d80a4 (diff) | |
| parent | 91db4642f868cf2e591b62d31a19d35b02ea791e (diff) | |
| download | focaccia-qemu-0f72559fbc9e1ae45aa8ebeed0443fe3a7a388a8.tar.gz focaccia-qemu-0f72559fbc9e1ae45aa8ebeed0443fe3a7a388a8.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20161227' into staging
target-arm queue: * add VBAR support to ARM1176 CPUs * hw/i2c: add NULL check to i2c slave init callbacks * pxa2xx.c: fix trailing whitespace * aspeed: various cleanups * aspeed: add romulus-bmc board * virt: add 2.9 machine type * gicv3: don't signal Pending+Active interrupts to CPU * gicv3: fix incorrect usage of fieldoffset * arm: log AArch64 exception returns * gicv3: fix aff3 field in typer register * aarch64: fix ldst_single_struct on BE hosts * aarch64: fix vec_reg_offset on BE hosts * arm: fix Cortex-A8 MVFR1 register value * cadence_uart: check if receiver timeout counter disabled * cadence_uart: check register values on migration # gpg: Signature made Tue 27 Dec 2016 15:19:26 GMT # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20161227: (25 commits) target-arm: Add VBAR support to ARM1176 CPUs hw/i2c: Add a NULL check for i2c slave init callbacks hw/arm: remove trailing whitespace aspeed/smc: set the number of flash modules for the FMC controller aspeed/smc: improve segment register support aspeed/scu: fix SCU region size aspeed: change SoC revision of the palmetto-bmc machine aspeed: add the definitions for the AST2400 A1 SoC aspeed: add a memory region for SRAM aspeed: add support for the romulus-bmc board aspeed: extend the board configuration with flash models aspeed: attach the second SPI controller object to the SoC aspeed: remove cannot_destroy_with_object_finalize_yet aspeed: QOMify the CPU object and attach it to the SoC m25p80: add support for the mx66l1g45g hw/arm/virt: add 2.9 machine type hw/intc/arm_gicv3: Don't signal Pending+Active interrupts to CPU hw/intc/arm_gicv3: Remove incorrect usage of fieldoffset target-arm: Log AArch64 exception returns hw/intc/arm_gicv3_common: fix aff3 in typer ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'async.c')
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