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| author | Peter Maydell <peter.maydell@linaro.org> | 2025-08-28 15:04:22 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-09-16 17:31:54 +0100 |
| commit | effe47ff4840860811e2e1cccfd60cb1cea8e459 (patch) | |
| tree | 137cec2ecf91d7e8f0c691deea4486c825430f3c /bsd-user/arm/target_arch_elf.h | |
| parent | 4f0fa4bfd98f3ccdcdeed6f43a2340084a6e0a92 (diff) | |
| download | focaccia-qemu-effe47ff4840860811e2e1cccfd60cb1cea8e459.tar.gz focaccia-qemu-effe47ff4840860811e2e1cccfd60cb1cea8e459.zip | |
target/arm: Drop ARM_FEATURE_IWMMXT handling
We have now removed all the CPU types which had the Intel XScale extensions indicated via ARM_FEATURE_IWMMXT, so this feature bit is never set. Remove all the code that can only be reached when using this flag. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250828140422.3271703-6-peter.maydell@linaro.org
Diffstat (limited to 'bsd-user/arm/target_arch_elf.h')
| -rw-r--r-- | bsd-user/arm/target_arch_elf.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/bsd-user/arm/target_arch_elf.h b/bsd-user/arm/target_arch_elf.h index b1c0fd2b32..b54bf5fbc6 100644 --- a/bsd-user/arm/target_arch_elf.h +++ b/bsd-user/arm/target_arch_elf.h @@ -86,7 +86,6 @@ static uint32_t get_elf_hwcap(void) /* probe for the extra features */ /* EDSP is in v5TE and above */ GET_FEATURE(ARM_FEATURE_V5, ARM_HWCAP_ARM_EDSP); - GET_FEATURE(ARM_FEATURE_IWMMXT, ARM_HWCAP_ARM_IWMMXT); GET_FEATURE(ARM_FEATURE_THUMB2EE, ARM_HWCAP_ARM_THUMBEE); GET_FEATURE(ARM_FEATURE_NEON, ARM_HWCAP_ARM_NEON); GET_FEATURE(ARM_FEATURE_V6K, ARM_HWCAP_ARM_TLS); |