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authorAnthony Liguori <aliguori@us.ibm.com>2012-03-14 16:47:49 -0500
committerAnthony Liguori <aliguori@us.ibm.com>2012-03-14 16:47:49 -0500
commitaea6ff7fa07b046fb9f43d6262d6e34b77e8437e (patch)
treedd3043d1742273a95fa7fc5e99b8d5ffe0c710e5 /bsd-user/main.c
parent9e4dd565b46749d5e6d5cf87bfd84f1917c68319 (diff)
parentdd83b06ae61cfa2dc4381ab49f365bd0995fc930 (diff)
downloadfocaccia-qemu-aea6ff7fa07b046fb9f43d6262d6e34b77e8437e.tar.gz
focaccia-qemu-aea6ff7fa07b046fb9f43d6262d6e34b77e8437e.zip
Merge remote-tracking branch 'afaerber/qom-cpu.v5' into staging
* afaerber/qom-cpu.v5: (43 commits)
  qom: Introduce CPU class
  Rename CPUState -> CPUArchState
  xtensa hw/: Don't use CPUState
  sparc hw/: Don't use CPUState
  sh4 hw/: Don't use CPUState
  s390x hw/: Don't use CPUState
  ppc hw/: Don't use CPUState
  mips hw/: Don't use CPUState
  microblaze hw/: Don't use CPUState
  m68k hw/: Don't use CPUState
  lm32 hw/: Don't use CPUState
  i386 hw/: Don't use CPUState
  cris hw/: Don't use CPUState
  arm hw/: Don't use CPUState
  alpha hw/: Don't use CPUState
  xtensa-semi: Don't use CPUState
  m68k-semi: Don't use CPUState
  arm-semi: Don't use CPUState
  target-xtensa: Don't overuse CPUState
  target-unicore32: Don't overuse CPUState
  ...
Diffstat (limited to 'bsd-user/main.c')
-rw-r--r--bsd-user/main.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/bsd-user/main.c b/bsd-user/main.c
index cdb0d0ac99..48cb715d2d 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -63,18 +63,18 @@ void gemu_log(const char *fmt, ...)
 }
 
 #if defined(TARGET_I386)
-int cpu_get_pic_interrupt(CPUState *env)
+int cpu_get_pic_interrupt(CPUX86State *env)
 {
     return -1;
 }
 #endif
 
 /* These are no-ops because we are not threadsafe.  */
-static inline void cpu_exec_start(CPUState *env)
+static inline void cpu_exec_start(CPUArchState *env)
 {
 }
 
-static inline void cpu_exec_end(CPUState *env)
+static inline void cpu_exec_end(CPUArchState *env)
 {
 }
 
@@ -109,7 +109,7 @@ void cpu_list_unlock(void)
 /***********************************************************/
 /* CPUX86 core interface */
 
-void cpu_smm_update(CPUState *env)
+void cpu_smm_update(CPUX86State *env)
 {
 }
 
@@ -713,7 +713,7 @@ static void usage(void)
     exit(1);
 }
 
-THREAD CPUState *thread_env;
+THREAD CPUArchState *thread_env;
 
 /* Assumes contents are already zeroed.  */
 void init_task_state(TaskState *ts)
@@ -737,7 +737,7 @@ int main(int argc, char **argv)
     struct target_pt_regs regs1, *regs = &regs1;
     struct image_info info1, *info = &info1;
     TaskState ts1, *ts = &ts1;
-    CPUState *env;
+    CPUArchState *env;
     int optind;
     const char *r;
     int gdbstub_port = 0;
@@ -917,7 +917,7 @@ int main(int argc, char **argv)
         exit(1);
     }
 #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
-    cpu_reset(env);
+    cpu_state_reset(env);
 #endif
     thread_env = env;