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authorRichard Henderson <rth@twiddle.net>2010-03-10 15:53:37 -0800
committerPaul Brook <paul@codesourcery.com>2010-03-12 16:31:09 +0000
commit5cd2c5b6ad75c46d40118ac67c0c09d4e7930a65 (patch)
tree6d024eefeab2a13c4b8a39335a028aa7a151c623 /cache-utils.c
parent14f24e1465edc44b9b4d89fbbea66e06088154e1 (diff)
downloadfocaccia-qemu-5cd2c5b6ad75c46d40118ac67c0c09d4e7930a65.tar.gz
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Implement multi-level page tables.
Define L1_MAP_ADDR_SPACE_BITS to be either the virtual address size
(in user mode) or physical address size (in system mode), and use
that to size l1_map.  This rewrites page_find_alloc, page_flush_tb,
and walk_memory_regions.

Use TARGET_PHYS_ADDR_SPACE_BITS for the physical memory map based
off of l1_phys_map.  This rewrites page_phys_find_alloc and
phys_page_for_each.

Signed-off-by: Richard Henderson <rth@twiddle.net>
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