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| author | Aurelien Jarno <aurelien@aurel32.net> | 2013-09-03 01:35:43 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2013-09-03 01:35:43 +0200 |
| commit | 545825d4cda03ea292b7788b3401b99860efe8bc (patch) | |
| tree | 22983d4bcd8f48fb38561d241ac5e2d7e51e5a22 /cpu-exec.c | |
| parent | 32f3bd6d4d6d6f835cbc2b9241fe8c32d2898d73 (diff) | |
| parent | 6fb5874590589585cdcad4ca2431d9d8d4d491b1 (diff) | |
| download | focaccia-qemu-545825d4cda03ea292b7788b3401b99860efe8bc.tar.gz focaccia-qemu-545825d4cda03ea292b7788b3401b99860efe8bc.zip | |
Merge branch 'tcg-next' of git://github.com/rth7680/qemu
* 'tcg-next' of git://github.com/rth7680/qemu: (29 commits) tcg-i386: Make use of zero-extended memory helper routines tcg: Introduce zero and sign-extended versions of load helpers exec: Split softmmu_defs.h target: Include softmmu_exec.h where forgotten exec: Rename USUFFIX to LSUFFIX tcg-i386: Don't perform GETPC adjustment in TCG code exec: Reorganize the GETRA/GETPC macros configure: Allow x32 as a host tcg-i386: Adjust tcg_out_tlb_load for x32 tcg-i386: Use intptr_t appropriately tcg: Fix jit debug for x32 tcg: Use appropriate types in tcg_reg_alloc_call tcg: Change tcg_out_ld/st offset to intptr_t tcg: Change tcg_gen_exit_tb argument to uintptr_t tcg: Use uintptr_t in TCGHelperInfo tcg: Change relocation offsets to intptr_t tcg: Change memory offsets to intptr_t tcg: Change frame pointer offsets to intptr_t tcg: Define TCG_ptr properly tcg: Define TCG_TYPE_PTR properly ...
Diffstat (limited to 'cpu-exec.c')
| -rw-r--r-- | cpu-exec.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu-exec.c b/cpu-exec.c index 301be28bf7..5a4399509e 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -53,7 +53,7 @@ void cpu_resume_from_signal(CPUArchState *env, void *puc) static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr) { CPUArchState *env = cpu->env_ptr; - tcg_target_ulong next_tb = tcg_qemu_tb_exec(env, tb_ptr); + uintptr_t next_tb = tcg_qemu_tb_exec(env, tb_ptr); if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) { /* We didn't start executing this TB (eg because the instruction * counter hit zero); we must restore the guest PC to the address @@ -209,7 +209,7 @@ int cpu_exec(CPUArchState *env) int ret, interrupt_request; TranslationBlock *tb; uint8_t *tc_ptr; - tcg_target_ulong next_tb; + uintptr_t next_tb; if (cpu->halted) { if (!cpu_has_work(cpu)) { |