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| author | Richard Henderson <rth@twiddle.net> | 2014-09-13 09:45:34 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-09-25 18:54:22 +0100 |
| commit | 6a0fcbdf2de908e6ef910aaee778abe987e49d52 (patch) | |
| tree | 8c8a10b399b99235bc9f0be74df24e15313054e0 /cpu-exec.c | |
| parent | 42f53fea9f5c3f02e52bd781559f92cb58fbe8a7 (diff) | |
| download | focaccia-qemu-6a0fcbdf2de908e6ef910aaee778abe987e49d52.tar.gz focaccia-qemu-6a0fcbdf2de908e6ef910aaee778abe987e49d52.zip | |
cpu-exec: Do CPU_INTERRUPT_HALT unconditionally
The signal is currently checked by 10 targets, but only actually raised by Sparc and ARM. For the sake of one test-and-branch, we can handle this generic bit generically. Signed-off-by: Richard Henderson <rth@twiddle.net> Message-id: 1410626734-3804-24-git-send-email-rth@twiddle.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'cpu-exec.c')
| -rw-r--r-- | cpu-exec.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/cpu-exec.c b/cpu-exec.c index b9774814db..3913de020b 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -404,17 +404,12 @@ int cpu_exec(CPUArchState *env) cpu->exception_index = EXCP_DEBUG; cpu_loop_exit(cpu); } -#if defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_MIPS) || \ - defined(TARGET_PPC) || defined(TARGET_ALPHA) || defined(TARGET_CRIS) || \ - defined(TARGET_MICROBLAZE) || defined(TARGET_LM32) || \ - defined(TARGET_UNICORE32) || defined(TARGET_TRICORE) if (interrupt_request & CPU_INTERRUPT_HALT) { cpu->interrupt_request &= ~CPU_INTERRUPT_HALT; cpu->halted = 1; cpu->exception_index = EXCP_HLT; cpu_loop_exit(cpu); } -#endif #if defined(TARGET_I386) if (interrupt_request & CPU_INTERRUPT_INIT) { cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0); |