diff options
| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2003-06-21 13:13:25 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2003-06-21 13:13:25 +0000 |
| commit | 970a87a6bb8dd0ac304a55aeed219e225fbbea38 (patch) | |
| tree | d9fcd4906c3964bef2239d3b3a287573ee07f803 /cpu-exec.c | |
| parent | d8bc1fd0aeb0423074b5063c8dc94dddd7285321 (diff) | |
| download | focaccia-qemu-970a87a6bb8dd0ac304a55aeed219e225fbbea38.tar.gz focaccia-qemu-970a87a6bb8dd0ac304a55aeed219e225fbbea38.zip | |
new segment access
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@255 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'cpu-exec.c')
| -rw-r--r-- | cpu-exec.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/cpu-exec.c b/cpu-exec.c index 8d9ffa678d..c5e530c934 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -178,21 +178,21 @@ int cpu_exec(CPUState *env1) /* we compute the CPU state. We assume it will not change during the whole generated block. */ #if defined(TARGET_I386) - flags = env->seg_cache[R_CS].seg_32bit << GEN_FLAG_CODE32_SHIFT; - flags |= env->seg_cache[R_SS].seg_32bit << GEN_FLAG_SS32_SHIFT; - flags |= (((unsigned long)env->seg_cache[R_DS].base | - (unsigned long)env->seg_cache[R_ES].base | - (unsigned long)env->seg_cache[R_SS].base) != 0) << + flags = env->segs[R_CS].seg_32bit << GEN_FLAG_CODE32_SHIFT; + flags |= env->segs[R_SS].seg_32bit << GEN_FLAG_SS32_SHIFT; + flags |= (((unsigned long)env->segs[R_DS].base | + (unsigned long)env->segs[R_ES].base | + (unsigned long)env->segs[R_SS].base) != 0) << GEN_FLAG_ADDSEG_SHIFT; if (!(env->eflags & VM_MASK)) { - flags |= (env->segs[R_CS] & 3) << GEN_FLAG_CPL_SHIFT; + flags |= (env->segs[R_CS].selector & 3) << GEN_FLAG_CPL_SHIFT; } else { /* NOTE: a dummy CPL is kept */ flags |= (1 << GEN_FLAG_VM_SHIFT); flags |= (3 << GEN_FLAG_CPL_SHIFT); } flags |= (env->eflags & (IOPL_MASK | TF_MASK)); - cs_base = env->seg_cache[R_CS].base; + cs_base = env->segs[R_CS].base; pc = cs_base + env->eip; #elif defined(TARGET_ARM) flags = 0; @@ -347,13 +347,13 @@ void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector) if (env->eflags & VM_MASK) { SegmentCache *sc; selector &= 0xffff; - sc = &env->seg_cache[seg_reg]; + sc = &env->segs[seg_reg]; /* NOTE: in VM86 mode, limit and seg_32bit are never reloaded, so we must load them here */ sc->base = (void *)(selector << 4); sc->limit = 0xffff; sc->seg_32bit = 0; - env->segs[seg_reg] = selector; + sc->selector = selector; } else { load_seg(seg_reg, selector, 0); } @@ -426,7 +426,7 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address, return 0; #if defined(TARGET_I386) env->eip = found_pc - tb->cs_base; - env->cr2 = address; + env->cr[2] = address; /* we restore the process signal mask as the sigreturn should do it (XXX: use sigsetjmp) */ sigprocmask(SIG_SETMASK, old_set, NULL); |