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| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-06-26 19:53:29 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-06-26 19:53:29 +0000 |
| commit | a80dde08372ca86b48363dfee019af0dc3bc97aa (patch) | |
| tree | 816f9969502e850e0e1cd3ecb5567170342c6d0b /cpu-exec.c | |
| parent | 29133e9a0fff5775f8a1bef8671802a8624fc2c4 (diff) | |
| download | focaccia-qemu-a80dde08372ca86b48363dfee019af0dc3bc97aa.tar.gz focaccia-qemu-a80dde08372ca86b48363dfee019af0dc3bc97aa.zip | |
SPARC FPU optimization (Blue Swirl)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2023 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'cpu-exec.c')
| -rw-r--r-- | cpu-exec.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/cpu-exec.c b/cpu-exec.c index 926093afbb..60239d4b96 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -175,9 +175,13 @@ static inline TranslationBlock *tb_find_fast(void) pc = env->regs[15]; #elif defined(TARGET_SPARC) #ifdef TARGET_SPARC64 - flags = (env->pstate << 2) | ((env->lsu & (DMMU_E | IMMU_E)) >> 2); + // Combined FPU enable bits . PRIV . DMMU enabled . IMMU enabled + flags = (((env->pstate & PS_PEF) >> 1) | ((env->fprs & FPRS_FEF) << 2)) + | (env->pstate & PS_PRIV) | ((env->lsu & (DMMU_E | IMMU_E)) >> 2); #else - flags = env->psrs | ((env->mmuregs[0] & (MMU_E | MMU_NF)) << 1); + // FPU enable . MMU enabled . MMU no-fault . Supervisor + flags = (env->psref << 3) | ((env->mmuregs[0] & (MMU_E | MMU_NF)) << 1) + | env->psrs; #endif cs_base = env->npc; pc = env->pc; |