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authorWANG Rui <wangrui@loongson.cn>2025-04-18 16:21:02 +0800
committerSong Gao <gaosong@loongson.cn>2025-04-24 10:46:31 +0800
commit875caabdb1701a7c57ad0655a7963d74afc1b4d9 (patch)
tree4f77d70f69a7c2c11105dbbcbd592f28083adce4 /cpu-target.c
parent256df51e727235b3d5e937ca2784c45663c00f59 (diff)
downloadfocaccia-qemu-875caabdb1701a7c57ad0655a7963d74afc1b4d9.tar.gz
focaccia-qemu-875caabdb1701a7c57ad0655a7963d74afc1b4d9.zip
target/loongarch: Guard BCEQZ/BCNEZ instructions with FP feature
The BCEQZ and BCNEZ instructions depend on access to condition codes
from floating-point comparisons. Previously, these instructions were
unconditionally enabled for 64-bit targets.

This patch updates their translation to be gated under the `FP` feature
flag instead, ensuring they are only available when the floating-point
unit is present.

This improves correctness for CPUs lacking floating-point support.

Signed-off-by: WANG Rui <wangrui@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20250418082103.447780-3-wangrui@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Diffstat (limited to 'cpu-target.c')
0 files changed, 0 insertions, 0 deletions