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| author | James Hogan <james.hogan@imgtec.com> | 2015-10-02 13:24:13 +0100 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-10-19 11:04:38 -1000 |
| commit | d76f36535099b5d3d880c5e3ac1d411420c8a086 (patch) | |
| tree | 0cb544fed18df639f7c459412a06b8e730ce9208 /disas/mips.c | |
| parent | c0e40dbdcc291c85faa289a53be60b7b1b7c7598 (diff) | |
| download | focaccia-qemu-d76f36535099b5d3d880c5e3ac1d411420c8a086.tar.gz focaccia-qemu-d76f36535099b5d3d880c5e3ac1d411420c8a086.zip | |
disas/mips: Add R6 jr/jr.hb to disassembler
MIPS r6 encodes jr as jalr zero, and jr.hb as jalr.hb zero, so add these encodings to the MIPS disassembly table. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <1443788657-14537-3-git-send-email-james.hogan@imgtec.com>
Diffstat (limited to 'disas/mips.c')
| -rw-r--r-- | disas/mips.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/disas/mips.c b/disas/mips.c index 01336a8385..bf0bbaf86a 100644 --- a/disas/mips.c +++ b/disas/mips.c @@ -2420,9 +2420,11 @@ const struct mips_opcode mips_builtin_opcodes[] = {"hibernate","", 0x42000023, 0xffffffff, 0, 0, V1 }, {"ins", "t,r,+A,+B", 0x7c000004, 0xfc00003f, WR_t|RD_s, 0, I33 }, {"jr", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, 0, I1 }, +{"jr", "s", 0x00000009, 0xfc1fffff, UBD|RD_s, 0, I32R6 }, /* jalr */ /* jr.hb is officially MIPS{32,64}R2, but it works on R1 as jr with the same hazard barrier effect. */ {"jr.hb", "s", 0x00000408, 0xfc1fffff, UBD|RD_s, 0, I32 }, +{"jr.hb", "s", 0x00000409, 0xfc1fffff, UBD|RD_s, 0, I32R6 }, /* jalr.hb */ {"j", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, 0, I1 }, /* jr */ /* SVR4 PIC code requires special handling for j, so it must be a macro. */ |