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authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>2025-02-24 09:31:19 -0300
committerAlistair Francis <alistair.francis@wdc.com>2025-03-04 15:42:54 +1000
commita1e61fc44b1a5fdad08206cbd7f015d1cc146713 (patch)
tree6c3e767188ad44523a1e6fa2b044335c2a3eba06 /docs/devel/index-internals.rst
parent1a65210876e79b4cbd40844f715eb24fb9abff14 (diff)
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target/riscv/kvm: add kvm_riscv_reset_regs_csr()
We're setting reset vals for KVM csrs during kvm_riscv_reset_vcpu(), but
in no particular order and missing some of them (like env->mstatus).

Create a helper to do that, unclogging reset_vcpu(), and initialize
env->mstatus as well. Keep the regs in the same order they appear in
struct kvm_riscv_csr from the KVM UAPI, similar to what
kvm_riscv_(get|put)_regs_csr are doing. This will make a bit easier to
add new KVM CSRs and to verify which values we're writing back to KVM
during vcpu reset.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250224123120.1644186-3-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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