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| author | Jiaxun Yang <jiaxun.yang@flygoat.com> | 2022-11-02 16:57:18 +0000 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2022-11-08 01:04:25 +0100 |
| commit | 2a2105a26219695c72bfc7cab9b7d37754fc0920 (patch) | |
| tree | 818f9a0936e9ffa20f5a7ce6a8708ac1e60b97b6 /docs/devel/secure-coding-practices.rst | |
| parent | 4bfc895383ed65b83d55a8ae5738a166c1cc48f1 (diff) | |
| download | focaccia-qemu-2a2105a26219695c72bfc7cab9b7d37754fc0920.tar.gz focaccia-qemu-2a2105a26219695c72bfc7cab9b7d37754fc0920.zip | |
target/mips: Don't check COP1X for 64 bit FP mode
Some implementations (i.e. Loongson-2F) may decide to implement a 64 bit FPU without implementing COP1X instructions. As the eligibility of 64 bit FP instructions is already determined by CP0St_FR, there is no need to check for COP1X again. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221102165719.190378-1-jiaxun.yang@flygoat.com> [PMD: Add missing trailing parenthesis (buildfix)] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Diffstat (limited to 'docs/devel/secure-coding-practices.rst')
0 files changed, 0 insertions, 0 deletions