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| author | Bernhard Beschow <shentey@gmail.com> | 2023-09-08 10:42:34 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2023-10-04 18:15:05 -0400 |
| commit | 40a6b8935d5862840c602f977564d2ebbea60ed6 (patch) | |
| tree | d649b341aa2e8232210e11eb4800a72f913c27ac /docs/devel/secure-coding-practices.rst | |
| parent | 7f558ea58bb60257b111abac0424dc601ff54875 (diff) | |
| download | focaccia-qemu-40a6b8935d5862840c602f977564d2ebbea60ed6.tar.gz focaccia-qemu-40a6b8935d5862840c602f977564d2ebbea60ed6.zip | |
hw/acpi/core: Trace enable and status registers of GPE separately
The bit positions of both registers are related. Tracing the registers independently results in the same offsets across these registers which eases debugging. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230908084234.17642-9-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'docs/devel/secure-coding-practices.rst')
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