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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-09-01 09:02:39 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-09-01 11:08:17 +0100 |
| commit | 73d260db3c7597c1efe7541057469358d2e5d001 (patch) | |
| tree | f0d0963e04faf37341b71d4060afe7aa7b0f010a /docs/devel/secure-coding-practices.rst | |
| parent | 53fc5f61394927101416dc618480967dc7cd2171 (diff) | |
| download | focaccia-qemu-73d260db3c7597c1efe7541057469358d2e5d001.tar.gz focaccia-qemu-73d260db3c7597c1efe7541057469358d2e5d001.zip | |
target/arm: Implement MVE VCVT between single and half precision
Implement the MVE VCVT instruction which converts between single and half precision floating point. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'docs/devel/secure-coding-practices.rst')
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