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| author | Jamin Lin <jamin_lin@aspeedtech.com> | 2024-06-04 13:44:35 +0800 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2024-06-16 21:08:54 +0200 |
| commit | 92707992103effc3e4f6f8a03da59e627acc1e34 (patch) | |
| tree | 81d80765c10142a6c9a7c1da16ef6b00bdce46fa /docs/devel/secure-coding-practices.rst | |
| parent | 5dd883ab0635c9f715c77cc32622e458a0724581 (diff) | |
| download | focaccia-qemu-92707992103effc3e4f6f8a03da59e627acc1e34.tar.gz focaccia-qemu-92707992103effc3e4f6f8a03da59e627acc1e34.zip | |
aspeed: Add an AST2700 eval board
AST2700 CPU is ARM Cortex-A35 which is 64 bits. Add TARGET_AARCH64 to build this machine. According to the design of ast2700, it has a bootmcu(riscv-32) which is used for executing SPL. Then, CPUs(cortex-a35) execute u-boot, kernel and rofs. Currently, qemu not support emulate two CPU architectures at the same machine. Therefore, qemu will only support to emulate CPU(cortex-a35) side for ast2700 Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'docs/devel/secure-coding-practices.rst')
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