diff options
| author | Nicholas Piggin <npiggin@gmail.com> | 2023-05-28 19:53:05 +1000 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2024-02-23 23:24:43 +1000 |
| commit | a21d89b5f4084d8b739d81149e777522f1120e08 (patch) | |
| tree | 6586ba4febac2f0cd208384299e99c0c1604481e /docs/devel/writing-monitor-commands.rst | |
| parent | d8c14411d0bb5f3d5370e74f8e993eb4eb63c55a (diff) | |
| download | focaccia-qemu-a21d89b5f4084d8b739d81149e777522f1120e08.tar.gz focaccia-qemu-a21d89b5f4084d8b739d81149e777522f1120e08.zip | |
target/ppc: Add SMT support to time facilities
The TB, VTB, PURR, HDEC SPRs are per-LPAR registers, and the TFMR is a per-core register. Add the necessary SMT synchronisation and value sharing. The TFMR can only drive the timebase state machine via thread 0 of the core, which is almost certainly not right, but it is enough for skiboot and certain other proprietary firmware. Acked-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'docs/devel/writing-monitor-commands.rst')
0 files changed, 0 insertions, 0 deletions