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authorRichard Henderson <richard.henderson@linaro.org>2025-01-07 18:23:17 -0800
committerRichard Henderson <richard.henderson@linaro.org>2025-04-28 13:40:16 -0700
commit8109598b683ad2b6b02cd9c79dc15b7fc0b685aa (patch)
tree1195291b048222de2893d415f1ddbdb276a6d5b0 /docs/devel
parent9bf558ed17c274b172549894e8e343e6a1a1508c (diff)
downloadfocaccia-qemu-8109598b683ad2b6b02cd9c79dc15b7fc0b685aa.tar.gz
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tcg: Merge INDEX_op_divu2_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'docs/devel')
-rw-r--r--docs/devel/tcg-ops.rst10
1 files changed, 10 insertions, 0 deletions
diff --git a/docs/devel/tcg-ops.rst b/docs/devel/tcg-ops.rst
index 62af390854..8f3b5e91b2 100644
--- a/docs/devel/tcg-ops.rst
+++ b/docs/devel/tcg-ops.rst
@@ -307,6 +307,16 @@ Arithmetic
          pass *nh* as a simple sign-extension of *nl*, so the only
          overflow should be *INT_MIN* / -1.
 
+   * - divu2 *q*, *r*, *nl*, *nh*, *d*
+
+     - | *q* = *nh:nl* / *d* (unsigned)
+       | *r* = *nh:nl* % *d*
+       | Undefined behaviour if division by zero, or the double-word
+         numerator divided by the single-word divisor does not fit
+         within the single-word quotient.  The code generator will
+         pass 0 to *nh* to make a simple zero-extension of *nl*,
+         so overflow should never occur.
+
 Logical
 -------