Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-january-25-2019' into staging

MIPS queue for January 25, 2019

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# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown]
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* remotes/amarkovic/tags/mips-queue-january-25-2019:
  docs/qemu-cpu-models: Add MIPS/nanoMIPS QEMU supported CPU models
  qemu-doc: Add nanoMIPS ISA information
  tests: tcg: mips: Remove old directories
  tests: tcg: mips: Add two new Makefiles
  tests: tcg: mips: Move source files to new locations
  MAINTAINERS: Update MIPS sections
  target/mips: Add I6500 core configuration
  target/mips: nanoMIPS: Fix branch handling
  disas: nanoMIPS: Amend DSP instructions related comments
  target/mips: Extend gen_scwp() functionality to support EVA
  target/mips: Correct the second argument type of cpu_supports_isa()
  target/mips: nanoMIPS: Rename macros for extracting 3-bit-coded GPR numbers
  target/mips: nanoMIPS: Remove an unused macro
  target/mips: nanoMIPS: Remove duplicate macro definitions

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

1 files changed, 161 insertions, 2 deletions

diff --git a/docs/qemu-cpu-models.texi b/docs/qemu-cpu-models.texi
index 1935f98c63..475d434d52 100644
--- a/docs/qemu-cpu-models.texi
+++ b/docs/qemu-cpu-models.texi
@@ -5,8 +5,9 @@ QEMU / KVM CPU model configuration
 @c man begin DESCRIPTION
 
 @menu
-* recommendations_cpu_models_x86:: Recommendations for KVM CPU model configuration on x86 hosts
-* cpu_model_syntax_apps::          Syntax for configuring CPU models
+* recommendations_cpu_models_x86::  Recommendations for KVM CPU model configuration on x86 hosts
+* recommendations_cpu_models_MIPS:: Supported CPU model configurations on MIPS hosts
+* cpu_model_syntax_apps::           Syntax for configuring CPU models
 @end menu
 
 QEMU / KVM virtualization supports two ways to configure CPU models
@@ -368,6 +369,164 @@ hardware assisted virtualization, that should thus not be required for
 running virtual machines.
 @end table
 
+@node recommendations_cpu_models_MIPS
+@subsection Supported CPU model configurations on MIPS hosts
+
+QEMU supports variety of MIPS CPU models:
+
+@menu
+* cpu_models_MIPS32::               Supported CPU models for MIPS32 hosts
+* cpu_models_MIPS64::               Supported CPU models for MIPS64 hosts
+* cpu_models_nanoMIPS::             Supported CPU models for nanoMIPS hosts
+* preferred_cpu_models_MIPS::       Preferred CPU models for MIPS hosts
+@end menu
+
+@node cpu_models_MIPS32
+@subsubsection Supported CPU models for MIPS32 hosts
+
+The following CPU models are supported for use on MIPS32 hosts. Administrators /
+applications are recommended to use the CPU model that matches the generation
+of the host CPUs in use. In a deployment with a mixture of host CPU models
+between machines, if live migration compatibility is required, use the newest
+CPU model that is compatible across all desired hosts.
+
+@table @option
+@item @code{mips32r6-generic}
+
+MIPS32 Processor (Release 6, 2015)
+
+
+@item @code{P5600}
+
+MIPS32 Processor (P5600, 2014)
+
+
+@item @code{M14K}
+@item @code{M14Kc}
+
+MIPS32 Processor (M14K, 2009)
+
+
+@item @code{74Kf}
+
+MIPS32 Processor (74K, 2007)
+
+
+@item @code{34Kf}
+
+MIPS32 Processor (34K, 2006)
+
+
+@item @code{24Kc}
+@item @code{24KEc}
+@item @code{24Kf}
+
+MIPS32 Processor (24K, 2003)
+
+
+@item @code{4Kc}
+@item @code{4Km}
+@item @code{4KEcR1}
+@item @code{4KEmR1}
+@item @code{4KEc}
+@item @code{4KEm}
+
+MIPS32 Processor (4K, 1999)
+@end table
+
+@node cpu_models_MIPS64
+@subsubsection Supported CPU models for MIPS64 hosts
+
+The following CPU models are supported for use on MIPS64 hosts. Administrators /
+applications are recommended to use the CPU model that matches the generation
+of the host CPUs in use. In a deployment with a mixture of host CPU models
+between machines, if live migration compatibility is required, use the newest
+CPU model that is compatible across all desired hosts.
+
+@table @option
+@item @code{I6400}
+
+MIPS64 Processor (Release 6, 2014)
+
+
+@item @code{Loongson-2F}
+
+MIPS64 Processor (Longsoon 2, 2008)
+
+
+@item @code{Loongson-2E}
+
+MIPS64 Processor (Loongson 2, 2006)
+
+
+@item @code{mips64dspr2}
+
+MIPS64 Processor (Release 2, 2006)
+
+
+@item @code{MIPS64R2-generic}
+@item @code{5KEc}
+@item @code{5KEf}
+
+MIPS64 Processor (Release 2, 2002)
+
+
+@item @code{20Kc}
+
+MIPS64 Processor (20K, 2000)
+
+
+@item @code{5Kc}
+@item @code{5Kf}
+
+MIPS64 Processor (5K, 1999)
+
+
+@item @code{VR5432}
+
+MIPS64 Processor (VR, 1998)
+
+
+@item @code{R4000}
+
+MIPS64 Processor (MIPS III, 1991)
+@end table
+
+@node cpu_models_nanoMIPS
+@subsubsection Supported CPU models for nanoMIPS hosts
+
+The following CPU models are supported for use on nanoMIPS hosts. Administrators /
+applications are recommended to use the CPU model that matches the generation
+of the host CPUs in use. In a deployment with a mixture of host CPU models
+between machines, if live migration compatibility is required, use the newest
+CPU model that is compatible across all desired hosts.
+
+@table @option
+@item @code{I7200}
+
+MIPS I7200 (nanoMIPS, 2018)
+
+@end table
+
+@node preferred_cpu_models_MIPS
+@subsubsection Preferred CPU models for MIPS hosts
+
+The following CPU models are preferred for use on different MIPS hosts:
+
+@table @option
+@item @code{MIPS III}
+R4000
+
+@item @code{MIPS32R2}
+34Kf
+
+@item @code{MIPS64R6}
+I6400
+
+@item @code{nanoMIPS}
+I7200
+@end table
+
 @node cpu_model_syntax_apps
 @subsection Syntax for configuring CPU models