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| author | Peter Xu <peterx@redhat.com> | 2016-09-28 21:03:39 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2016-10-04 10:00:25 +0200 |
| commit | eabb5782f70b4a10975b24ccd7129929a05ac932 (patch) | |
| tree | 7c32841fbf0d48eea6383040b2dde1353446590f /docs/specs | |
| parent | 3cf294eebc98da6e2ff7976fcdf6a9b41984840e (diff) | |
| download | focaccia-qemu-eabb5782f70b4a10975b24ccd7129929a05ac932.tar.gz focaccia-qemu-eabb5782f70b4a10975b24ccd7129929a05ac932.zip | |
hw/misc/edu: support MSI interrupt
So now edu device can support both line or msi interrupt, depending on how user configures it. Signed-off-by: Peter Xu <peterx@redhat.com> Message-Id: <1475067819-21413-1-git-send-email-peterx@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'docs/specs')
| -rw-r--r-- | docs/specs/edu.txt | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/docs/specs/edu.txt b/docs/specs/edu.txt index 7f8146780b..0876310809 100644 --- a/docs/specs/edu.txt +++ b/docs/specs/edu.txt @@ -52,7 +52,7 @@ size == 8 for the rest. 0x20 (RW) : status register, bitwise OR 0x01 -- computing factorial (RO) - 0x80 -- raise interrupt 0x01 after finishing factorial computation + 0x80 -- raise interrupt after finishing factorial computation 0x24 (RO) : interrupt status register It contains values which raised the interrupt (see interrupt raise @@ -87,6 +87,11 @@ An IRQ is generated when written to the interrupt raise register. The value appears in interrupt status register when the interrupt is raised and has to be written to the interrupt acknowledge register to lower it. +The device supports both INTx and MSI interrupt. By default, INTx is +used. Even if the driver disabled INTx and only uses MSI, it still +needs to update the acknowledge register at the end of the IRQ handler +routine. + DMA controller -------------- One has to specify, source, destination, size, and start the transfer. One |