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authorPeter Maydell <peter.maydell@linaro.org>2024-01-09 14:43:55 +0000
committerPeter Maydell <peter.maydell@linaro.org>2024-01-09 14:44:45 +0000
commitbb7b95b070e3439eb46066963e6b870697344904 (patch)
tree5cadd9540d10d3997a55bd5b621fa88881c966ee /docs/sphinx-static/custom.js
parentdfe8a9ee6a8896c642b0ec0af4b484328249619a (diff)
downloadfocaccia-qemu-bb7b95b070e3439eb46066963e6b870697344904.tar.gz
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target/arm: Mark up VNCR offsets (offsets 0x100..0x160)
Mark up the cpreginfo structs to indicate offsets for system
registers from VNCR_EL2, as defined in table D8-66 in rule R_CSRPQ in
the Arm ARM.  This commit covers offsets 0x100 to 0x160.

Many (but not all) of the registers in this range have _EL12 aliases,
and the slot in memory is shared between the _EL12 version of the
register and the _EL1 version.  Where we programmatically generate
the regdef for the _EL12 register, arrange that its
nv2_redirect_offset is set up correctly to do this.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Miguel Luis <miguel.luis@oracle.com>
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