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| author | Román Cárdenas Rodríguez <rcardenas.rod@gmail.com> | 2024-10-14 17:05:50 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-10-15 11:29:45 +0100 |
| commit | 950dff9aa4dc1f287ea001e7d2689dcc76a7f1c4 (patch) | |
| tree | 82be116d42cb461b78a996bb12469feca33b338f /docs/system/arm/stm32.rst | |
| parent | d1613f2a5395f52a6537b0117bb219d832213489 (diff) | |
| download | focaccia-qemu-950dff9aa4dc1f287ea001e7d2689dcc76a7f1c4.tar.gz focaccia-qemu-950dff9aa4dc1f287ea001e7d2689dcc76a7f1c4.zip | |
hw/arm/stm32f405: Add RCC device to stm32f405 SoC
Add the reset and clock controller device to the stm32f405 SoC. Signed-off-by: Roman Cardenas Rodriguez <rcardenas.rod@gmail.com> [PMM: tweak commit message] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'docs/system/arm/stm32.rst')
| -rw-r--r-- | docs/system/arm/stm32.rst | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/docs/system/arm/stm32.rst b/docs/system/arm/stm32.rst index 3b640f3ee0..ca7a55841b 100644 --- a/docs/system/arm/stm32.rst +++ b/docs/system/arm/stm32.rst @@ -36,6 +36,7 @@ Supported devices * SPI controller * System configuration (SYSCFG) * Timer controller (TIMER) + * Reset and Clock Controller (RCC) (STM32F4 only, reset and enable only) Missing devices --------------- @@ -53,7 +54,7 @@ Missing devices * Power supply configuration (PWR) * Random Number Generator (RNG) * Real-Time Clock (RTC) controller - * Reset and Clock Controller (RCC) + * Reset and Clock Controller (RCC) (other features than reset and enable) * Secure Digital Input/Output (SDIO) interface * USB OTG * Watchdog controller (IWDG, WWDG) |