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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-07-18 13:46:39 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-07-18 13:46:39 +0100 |
| commit | fd79f89c76c8e2f409dd9db5d7a367b1f64b6dc6 (patch) | |
| tree | e67b50f02591b71681d33d2c5ba6964a29776458 /docs/system/arm | |
| parent | a97fca4ceb9d9b10aa8b582e817a5ee6c42ffbaf (diff) | |
| parent | 8fe612a183dec4c63afdc57537079bc742d024ca (diff) | |
| download | focaccia-qemu-fd79f89c76c8e2f409dd9db5d7a367b1f64b6dc6.tar.gz focaccia-qemu-fd79f89c76c8e2f409dd9db5d7a367b1f64b6dc6.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210718' into staging
target-arm queue: * Remove duplicate 'plus1' function from Neon and SVE decode * Fix offsets for TTBCR for big-endian hosts * docs: fix copyright date * docs: add license/version info to HTML footers * docs: add an About section * docs: document some more arm boards # gpg: Signature made Sun 18 Jul 2021 13:45:22 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210718: target/arm: Remove duplicate 'plus1' function from Neon and SVE decode docs: Add skeletal documentation of highbank and midway docs: Add skeletal documentation of the emcraft-sf2 docs: Add skeletal documentation of cubieboard docs: Add QEMU version information to HTML footer docs: Add license note to the HTML page footer docs: Add some actual About text to about/index.rst docs: Move deprecation, build and license info out of system/ docs: Remove "Contents:" lines from top-level subsections docs: Stop calling the top level subsections of our manual 'manuals' docs: Fix documentation Copyright date target/arm: Fix offsets for TTBCR Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'docs/system/arm')
| -rw-r--r-- | docs/system/arm/cubieboard.rst | 16 | ||||
| -rw-r--r-- | docs/system/arm/emcraft-sf2.rst | 15 | ||||
| -rw-r--r-- | docs/system/arm/highbank.rst | 19 |
3 files changed, 50 insertions, 0 deletions
diff --git a/docs/system/arm/cubieboard.rst b/docs/system/arm/cubieboard.rst new file mode 100644 index 0000000000..344ff8cef9 --- /dev/null +++ b/docs/system/arm/cubieboard.rst @@ -0,0 +1,16 @@ +Cubietech Cubieboard (``cubieboard``) +===================================== + +The ``cubieboard`` model emulates the Cubietech Cubieboard, +which is a Cortex-A8 based single-board computer using +the AllWinner A10 SoC. + +Emulated devices: + +- Timer +- UART +- RTC +- EMAC +- SDHCI +- USB controller +- SATA controller diff --git a/docs/system/arm/emcraft-sf2.rst b/docs/system/arm/emcraft-sf2.rst new file mode 100644 index 0000000000..377e248720 --- /dev/null +++ b/docs/system/arm/emcraft-sf2.rst @@ -0,0 +1,15 @@ +Emcraft SmartFusion2 SOM kit (``emcraft-sf2``) +============================================== + +The ``emcraft-sf2`` board emulates the SmartFusion2 SOM kit from +Emcraft (M2S010). This is a System-on-Module from EmCraft systems, +based on the SmartFusion2 SoC FPGA from Microsemi Corporation. +The SoC is based on a Cortex-M4 processor. + +Emulated devices: + +- System timer +- System registers +- SPI controller +- UART +- EMAC diff --git a/docs/system/arm/highbank.rst b/docs/system/arm/highbank.rst new file mode 100644 index 0000000000..bb4965b367 --- /dev/null +++ b/docs/system/arm/highbank.rst @@ -0,0 +1,19 @@ +Calxeda Highbank and Midway (``highbank``, ``midway``) +====================================================== + +``highbank`` is a model of the Calxeda Highbank (ECX-1000) system, +which has four Cortex-A9 cores. + +``midway`` is a model of the Calxeda Midway (ECX-2000) system, +which has four Cortex-A15 cores. + +Emulated devices: + +- L2x0 cache controller +- SP804 dual timer +- PL011 UART +- PL061 GPIOs +- PL031 RTC +- PL022 synchronous serial port controller +- AHCI +- XGMAC ethernet controllers |