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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-09-05 22:01:24 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-10-17 13:59:40 +0200 |
| commit | 9a2133f45c287e99ef23896a7a33b3d2dbfe97fd (patch) | |
| tree | 89f91a7d76459effed8ee4b34baa9813e94f98c9 /docs/system/device-url-syntax.rst.inc | |
| parent | 8a6359f937632d4b47bfaf0640c5acbf73736521 (diff) | |
| download | focaccia-qemu-9a2133f45c287e99ef23896a7a33b3d2dbfe97fd.tar.gz focaccia-qemu-9a2133f45c287e99ef23896a7a33b3d2dbfe97fd.zip | |
hw/mips/malta: Fix FPGA I/O region size
The FPGA present on the CoreCard has an I/O region 1MiB wide.
Refs:
- Atlas User’s Manual (Document Number: MD00005)
- Malta User’s Manual (Document Number: MD00048)
Fixes: ea85df72b60 ("mips_malta: convert to memory API")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200905213049.761949-1-f4bug@amsat.org>
Diffstat (limited to 'docs/system/device-url-syntax.rst.inc')
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