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| author | Daniel P. Berrangé <berrange@redhat.com> | 2022-07-07 17:37:15 +0100 |
|---|---|---|
| committer | Thomas Huth <thuth@redhat.com> | 2022-08-01 11:58:02 +0200 |
| commit | 7a21bee2aa52fc95b25e38372678986ee94f05f1 (patch) | |
| tree | a9f33a9cea93fa7769543b6dd3f01404d3b17fca /docs/system/devices | |
| parent | ebf705541c03ba90cb93eef605abd18728e0a25b (diff) | |
| download | focaccia-qemu-7a21bee2aa52fc95b25e38372678986ee94f05f1.tar.gz focaccia-qemu-7a21bee2aa52fc95b25e38372678986ee94f05f1.zip | |
misc: fix commonly doubled up words
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20220707163720.1421716-5-berrange@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
Diffstat (limited to 'docs/system/devices')
| -rw-r--r-- | docs/system/devices/cxl.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/docs/system/devices/cxl.rst b/docs/system/devices/cxl.rst index a57e4c4e5c..36031325cc 100644 --- a/docs/system/devices/cxl.rst +++ b/docs/system/devices/cxl.rst @@ -15,7 +15,7 @@ with CXL Host Bridges, which have CXL Root Ports which may be directly attached to CXL or PCI End Points. Alternatively there may be CXL Switches with CXL and PCI Endpoints attached below them. In many cases additional control and capabilities are exposed via PCI Express interfaces. -This sharing of interfaces and hence emulation code is is reflected +This sharing of interfaces and hence emulation code is reflected in how the devices are emulated in QEMU. In most cases the various CXL elements are built upon an equivalent PCIe devices. |