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| author | Aditya Gupta <adityag@linux.ibm.com> | 2024-07-31 11:20:22 +0530 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2024-11-04 09:12:47 +1000 |
| commit | 273db89bcaf42102580a7994fdf7f0651e35092c (patch) | |
| tree | 441f2e502ef66716591f91d13ecad6244c29c6c4 /docs/system/ppc | |
| parent | c0d964076c3e7fe75ea981d34cbf84612ddde663 (diff) | |
| download | focaccia-qemu-273db89bcaf42102580a7994fdf7f0651e35092c.tar.gz focaccia-qemu-273db89bcaf42102580a7994fdf7f0651e35092c.zip | |
ppc/pseries: Add Power11 cpu type
Add sPAPR CPU Core definition for Power11 Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Aditya Gupta <adityag@linux.ibm.com> Tested-by: Amit Machhiwal <amachhiw@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'docs/system/ppc')
| -rw-r--r-- | docs/system/ppc/pseries.rst | 17 |
1 files changed, 13 insertions, 4 deletions
diff --git a/docs/system/ppc/pseries.rst b/docs/system/ppc/pseries.rst index a876d897b6..bbc51aa7fc 100644 --- a/docs/system/ppc/pseries.rst +++ b/docs/system/ppc/pseries.rst @@ -14,10 +14,19 @@ virtualization capabilities. Supported devices ================= - * Multi processor support for many Power processors generations: POWER7, - POWER7+, POWER8, POWER8NVL, POWER9, and Power10. Support for POWER5+ exists, - but its state is unknown. - * Interrupt Controller, XICS (POWER8) and XIVE (POWER9 and Power10) + * Multi processor support for many Power processors generations: + - POWER7, POWER7+ + - POWER8, POWER8NVL + - POWER9 + - Power10 + - Power11 + - Support for POWER5+ also exists, works with correct kernel/userspace + * Interrupt Controller + - XICS (POWER8) + - XIVE (Supported by below:) + - POWER9 + - Power10 + - Power11 * vPHB PCIe Host bridge. * vscsi and vnet devices, compatible with the same devices available on a PowerVM hypervisor with VIOS managing LPARs. |