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| author | Li Zhijian <lizhijian@cn.fujitsu.com> | 2023-09-04 14:28:06 +0100 |
|---|---|---|
| committer | Michael Tokarev <mjt@tls.msk.ru> | 2023-09-21 11:31:18 +0300 |
| commit | 6ff359196d576606a1434145cf05f967a05c08fa (patch) | |
| tree | 1d88e5cea25e15e7aa897c51f60715ed05ab8500 /docs/system | |
| parent | acdc872d8abaa12de75722a0ed9a1e2fcdbe2452 (diff) | |
| download | focaccia-qemu-6ff359196d576606a1434145cf05f967a05c08fa.tar.gz focaccia-qemu-6ff359196d576606a1434145cf05f967a05c08fa.zip | |
docs/cxl: Change to lowercase as others
Using the same style as elsewhere for topology / topo Signed-off-by: Li Zhijian <lizhijian@cn.fujitsu.com> Link: https://lore.kernel.org/r/20230519085802.2106900-2-lizhijian@cn.fujitsu.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Fan Ni <fan.ni@samsung.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'docs/system')
| -rw-r--r-- | docs/system/devices/cxl.rst | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/docs/system/devices/cxl.rst b/docs/system/devices/cxl.rst index f12011e230..b742120657 100644 --- a/docs/system/devices/cxl.rst +++ b/docs/system/devices/cxl.rst @@ -157,7 +157,7 @@ responsible for allocating appropriate ranges from within the CFMWs and exposing those via normal memory configurations as would be done for system RAM. -Example system Topology. x marks the match in each decoder level:: +Example system topology. x marks the match in each decoder level:: |<------------------SYSTEM PHYSICAL ADDRESS MAP (1)----------------->| | __________ __________________________________ __________ | @@ -187,8 +187,8 @@ Example system Topology. x marks the match in each decoder level:: ___________|___ __________|__ __|_________ ___|_________ (3)| Root Port 0 | | Root Port 1 | | Root Port 2| | Root Port 3 | | Appears in | | Appears in | | Appears in | | Appear in | - | PCI topology | | PCI Topology| | PCI Topo | | PCI Topo | - | As 0c:00.0 | | as 0c:01.0 | | as de:00.0 | | as de:01.0 | + | PCI topology | | PCI topology| | PCI topo | | PCI topo | + | as 0c:00.0 | | as 0c:01.0 | | as de:00.0 | | as de:01.0 | |_______________| |_____________| |____________| |_____________| | | | | | | | | @@ -272,7 +272,7 @@ Example topology involving a switch:: | Root Port 0 | | Appears in | | PCI topology | - | As 0c:00.0 | + | as 0c:00.0 | |___________x___| | | |