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authorPeter Maydell <peter.maydell@linaro.org>2020-09-03 21:20:46 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-09-14 14:23:19 +0100
commit897d27260a7eaccbf4ff01e49021205c5616c8ef (patch)
tree1645625d2b4d52319440306f3f9b9cb1dd156e61 /docs/system
parente9b2bfaa64139f959fb8fe0b653ddff3b1b93601 (diff)
downloadfocaccia-qemu-897d27260a7eaccbf4ff01e49021205c5616c8ef.tar.gz
focaccia-qemu-897d27260a7eaccbf4ff01e49021205c5616c8ef.zip
hw/arm/mps2: New board model mps2-an386
Implement a model of the MPS2 with the AN386 firmware. This is
essentially identical to the AN385 firmware, but it has a
Cortex-M4 rather than a Cortex-M3.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20200903202048.15370-2-peter.maydell@linaro.org
Diffstat (limited to 'docs/system')
-rw-r--r--docs/system/arm/mps2.rst8
1 files changed, 5 insertions, 3 deletions
diff --git a/docs/system/arm/mps2.rst b/docs/system/arm/mps2.rst
index 3a98cb59b0..e680a4ceb7 100644
--- a/docs/system/arm/mps2.rst
+++ b/docs/system/arm/mps2.rst
@@ -1,5 +1,5 @@
-Arm MPS2 boards (``mps2-an385``, ``mps2-an505``, ``mps2-an511``, ``mps2-an521``)
-================================================================================
+Arm MPS2 boards (``mps2-an385``, ``mps2-an386``, ``mps2-an505``, ``mps2-an511``, ``mps2-an521``)
+================================================================================================
 
 These board models all use Arm M-profile CPUs.
 
@@ -12,6 +12,8 @@ QEMU models the following FPGA images:
 
 ``mps2-an385``
   Cortex-M3 as documented in ARM Application Note AN385
+``mps2-an386``
+  Cortex-M4 as documented in ARM Application Note AN386
 ``mps2-an511``
   Cortex-M3 'DesignStart' as documented in AN511
 ``mps2-an505``
@@ -21,7 +23,7 @@ QEMU models the following FPGA images:
 
 Differences between QEMU and real hardware:
 
-- AN385 remapping of low 16K of memory to either ZBT SSRAM1 or to
+- AN385/AN386 remapping of low 16K of memory to either ZBT SSRAM1 or to
   block RAM is unimplemented (QEMU always maps this to ZBT SSRAM1, as
   if zbt_boot_ctrl is always zero)
 - QEMU provides a LAN9118 ethernet rather than LAN9220; the only guest