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| author | Arnaud Minier <arnaud.minier@telecom-paris.fr> | 2024-03-29 18:44:01 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-04-25 10:21:59 +0100 |
| commit | 92741432ed6f98ab01bdace5baaf2894c7855563 (patch) | |
| tree | 6ed359600f9a15521ec0f9fc9c99f53490e522fa /docs/system | |
| parent | c4c12ee48709aeb896ebb60163e8eb26cdaa3d65 (diff) | |
| download | focaccia-qemu-92741432ed6f98ab01bdace5baaf2894c7855563.tar.gz focaccia-qemu-92741432ed6f98ab01bdace5baaf2894c7855563.zip | |
hw/arm: Add the USART to the stm32l4x5 SoC
Add the USART to the SoC and connect it to the other implemented devices. Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240329174402.60382-5-arnaud.minier@telecom-paris.fr [PMM: fixed a few checkpatch nits] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'docs/system')
| -rw-r--r-- | docs/system/arm/b-l475e-iot01a.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/docs/system/arm/b-l475e-iot01a.rst b/docs/system/arm/b-l475e-iot01a.rst index 0afef8e4f4..a76c9976c5 100644 --- a/docs/system/arm/b-l475e-iot01a.rst +++ b/docs/system/arm/b-l475e-iot01a.rst @@ -19,13 +19,13 @@ Currently B-L475E-IOT01A machine's only supports the following devices: - STM32L4x5 SYSCFG (System configuration controller) - STM32L4x5 RCC (Reset and clock control) - STM32L4x5 GPIOs (General-purpose I/Os) +- STM32L4x5 USARTs, UARTs and LPUART (Serial ports) Missing devices """"""""""""""" The B-L475E-IOT01A does *not* support the following devices: -- Serial ports (UART) - Analog to Digital Converter (ADC) - SPI controller - Timer controller (TIMER) |