diff options
| author | Stefan Hajnoczi <stefanha@redhat.com> | 2025-02-21 07:14:03 +0800 |
|---|---|---|
| committer | Stefan Hajnoczi <stefanha@redhat.com> | 2025-02-21 07:14:03 +0800 |
| commit | f41af4c5857b6983766aaffc041580ff170d0679 (patch) | |
| tree | 9d79ee877ba0cf60f69ea761278ec925d6986d81 /docs/system | |
| parent | 40efe733e10cc00e4fb4f9f5790a28e744e63c62 (diff) | |
| parent | 1c3169179b8242866316108386800379c4e22974 (diff) | |
| download | focaccia-qemu-f41af4c5857b6983766aaffc041580ff170d0679.tar.gz focaccia-qemu-f41af4c5857b6983766aaffc041580ff170d0679.zip | |
Merge tag 'pull-target-arm-20250220' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Fix some incorrect syndrome values in various sysreg traps * Clean up sysreg trap code to avoid similar future bugs * Make boards/SoCs using a9mpcore and a15mpcore objects specify number of GIC interrupts explicitly * Kconfig: Extract CONFIG_USB_CHIPIDEA from CONFIG_IMX * target/arm: Use uint32_t in t32_expandimm_imm() * New board model: NPCM845 Evaluation board "npcm845-evb" # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAme3Vk8ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3t8QD/48yOUtFwUMFrwbbszK5rss # Ghhtk0ylKIxPQirgzjLUNq4hV2MZEtdmyiqaEllvA0aS839oWhFW0hbsGmoL/TVF # tqXVP3Y1dMubmNHCGcgiFqaxaInnNSC9S1ALiEm5a37g519706WLXPVLqJJ9t31b # uWHKT1hqxstzWSExhGrEkSEghcgN3u1KyCz0zyq9bk/F3OFWZfHNH6JqutQX18Ua # 5HtcD1Pum6WjayBc3y4AYVYH4xyQclY7LPR+zKNf2d5GuZ+J6MlXMyfCuE2/J//m # wHAtAoeuFhi/HFHR4vQP4L7HrhFrECbjfWha85F/rmiOAo6LnbICyPt4tAPe5So3 # FCtSHfht9ToulBqULE+F/AWVCdt8UeDRgOANSHFsMkxYiUK8QpMv8A2AtwJUqiMp # WbAzw31f6SgANgFQObhoRNE3QyX8V53ZJAsPhDooTxwMiglqVTM3Xux8W2zz9FdU # BTwCy23efBqKf4RWfeHjAXctGshePI1mTBJmvEKG5G5ligMNeg7ZiQqqfRVBagc/ # gpsQKNjpN9MVVds3thUvMCYO/9NOeeAtcVA2vW7qf7HrYaM72UngCPWjhNfAj/9I # 9hxgqEnKC6qoD/zMyFv+XwqNlL1PuD79rbvN8TWFd/f8iBIYOY6WVEYmsi7WGugI # WzYI93RqFaQhrpyHDcRVGw== # =djUd # -----END PGP SIGNATURE----- # gpg: Signature made Fri 21 Feb 2025 00:20:31 HKT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20250220' of https://git.linaro.org/people/pmaydell/qemu-arm: (41 commits) docs/system/arm: Add Description for NPCM8XX SoC hw/arm: Add NPCM845 Evaluation board hw/arm: Add NPCM8XX SoC hw/net: Add NPCM8XX PCS Module hw/misc: Support NPCM8XX CLK Module Registers hw/misc: Add nr_regs and cold_reset_values to NPCM CLK hw/misc: Move NPCM7XX CLK to NPCM CLK hw/misc: Rename npcm7xx_clk to npcm_clk hw/misc: Support 8-bytes memop in NPCM GCR module hw/misc: Store DRAM size in NPCM8XX GCR Module hw/misc: Add support for NPCM8XX GCR hw/misc: Add nr_regs and cold_reset_values to NPCM GCR hw/misc: Move NPCM7XX GCR to NPCM GCR hw/misc: Rename npcm7xx_gcr to npcm_gcr hw/ssi: Make flash size a property in NPCM7XX FIU pc-bios: Add NPCM8XX vBootrom roms: Update vbootrom to 1287b6e target/arm: Use uint32_t in t32_expandimm_imm() Kconfig: Extract CONFIG_USB_CHIPIDEA from CONFIG_IMX hw/cpu/arm_mpcore: Remove default values for GIC external IRQs ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'docs/system')
| -rw-r--r-- | docs/system/arm/nuvoton.rst | 27 |
1 files changed, 20 insertions, 7 deletions
diff --git a/docs/system/arm/nuvoton.rst b/docs/system/arm/nuvoton.rst index 05059378e5..e4827fb43a 100644 --- a/docs/system/arm/nuvoton.rst +++ b/docs/system/arm/nuvoton.rst @@ -1,12 +1,13 @@ -Nuvoton iBMC boards (``kudo-bmc``, ``mori-bmc``, ``npcm750-evb``, ``quanta-gbs-bmc``, ``quanta-gsj``) -===================================================================================================== +Nuvoton iBMC boards (``kudo-bmc``, ``mori-bmc``, ``npcm750-evb``, ``quanta-gbs-bmc``, ``quanta-gsj``, ``npcm845-evb``) +====================================================================================================================== -The `Nuvoton iBMC`_ chips (NPCM7xx) are a family of ARM-based SoCs that are +The `Nuvoton iBMC`_ chips are a family of Arm-based SoCs that are designed to be used as Baseboard Management Controllers (BMCs) in various -servers. They all feature one or two ARM Cortex-A9 CPU cores, as well as an -assortment of peripherals targeted for either Enterprise or Data Center / -Hyperscale applications. The former is a superset of the latter, so NPCM750 has -all the peripherals of NPCM730 and more. +servers. Currently there are two families: NPCM7XX series and +NPCM8XX series. NPCM7XX series feature one or two Arm Cortex-A9 CPU cores, +while NPCM8XX feature 4 Arm Cortex-A35 CPU cores. Both series contain a +different assortment of peripherals targeted for either Enterprise or Data +Center / Hyperscale applications. .. _Nuvoton iBMC: https://www.nuvoton.com/products/cloud-computing/ibmc/ @@ -27,6 +28,11 @@ There are also two more SoCs, NPCM710 and NPCM705, which are single-core variants of NPCM750 and NPCM730, respectively. These are currently not supported by QEMU. +The NPCM8xx SoC is the successor of the NPCM7xx SoC. It has 4 Cortex-A35 cores. +The following machines are based on this chip : + +- ``npcm845-evb`` Nuvoton NPCM845 Evaluation board + Supported devices ----------------- @@ -62,6 +68,8 @@ Missing devices * System Wake-up Control (SWC) * Shared memory (SHM) * eSPI slave interface + * Block-transfer interface (8XX only) + * Virtual UART (8XX only) * Ethernet controller (GMAC) * USB device (USBD) @@ -76,6 +84,11 @@ Missing devices * Video capture * Encoding compression engine * Security features + * I3C buses (8XX only) + * Temperature sensor interface (8XX only) + * Virtual UART (8XX only) + * Flash monitor (8XX only) + * JTAG master (8XX only) Boot options ------------ |