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| author | Ira Weiny <ira.weiny@intel.com> | 2023-05-26 18:00:07 +0100 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2023-06-22 18:55:14 -0400 |
| commit | 14180d6221502bd4b9d96fa5f1065e7cda4bcf00 (patch) | |
| tree | 8e806f5be8f9697f74ca732980986d6817f3b7a7 /docs | |
| parent | b455ce4c2f300c8ba47cba7232dd03261368a4cb (diff) | |
| download | focaccia-qemu-14180d6221502bd4b9d96fa5f1065e7cda4bcf00.tar.gz focaccia-qemu-14180d6221502bd4b9d96fa5f1065e7cda4bcf00.zip | |
bswap: Add the ability to store to an unaligned 24 bit field
CXL has 24 bit unaligned fields which need to be stored to. CXL is specified as little endian. Define st24_le_p() and the supporting functions to store such a field from a 32 bit host native value. The use of b, w, l, q as the size specifier is limiting. So "24" was used for the size part of the function name. Reviewed-by: Fan Ni <fan.ni@samsung.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20230526170010.574-2-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/devel/loads-stores.rst | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst index d2cefc77a2..dab6dfa0ac 100644 --- a/docs/devel/loads-stores.rst +++ b/docs/devel/loads-stores.rst @@ -36,6 +36,7 @@ store: ``st{size}_{endian}_p(ptr, val)`` ``size`` - ``b`` : 8 bits - ``w`` : 16 bits + - ``24`` : 24 bits - ``l`` : 32 bits - ``q`` : 64 bits @@ -65,6 +66,7 @@ of size ``sz`` bytes. Regexes for git grep - ``\<ld[us]\?[bwlq]\(_[hbl]e\)\?_p\>`` - ``\<st[bwlq]\(_[hbl]e\)\?_p\>`` + - ``\<st24\(_[hbl]e\)\?_p\>`` - ``\<ldn_\([hbl]e\)?_p\>`` - ``\<stn_\([hbl]e\)?_p\>`` |