diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2024-12-11 15:30:57 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-12-11 15:30:57 +0000 |
| commit | 10519d3b1aeb24d8173631d4fe0ecb91f2732e19 (patch) | |
| tree | 18a39c3957123c2366dbea95b37f38df46597eb2 /fpu/softfloat-specialize.c.inc | |
| parent | 43e51128083185ec5deb2cbe322fb851f7e2d2ae (diff) | |
| download | focaccia-qemu-10519d3b1aeb24d8173631d4fe0ecb91f2732e19.tar.gz focaccia-qemu-10519d3b1aeb24d8173631d4fe0ecb91f2732e19.zip | |
target/arm: Set Float3NaNPropRule explicitly
Set the Float3NaNPropRule explicitly for Arm, and remove the ifdef from pickNaNMulAdd(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-18-peter.maydell@linaro.org
Diffstat (limited to 'fpu/softfloat-specialize.c.inc')
| -rw-r--r-- | fpu/softfloat-specialize.c.inc | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index b4f3f0efa8..3a2d044447 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -505,13 +505,7 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls, } if (rule == float_3nan_prop_none) { -#if defined(TARGET_ARM) - /* - * This looks different from the ARM ARM pseudocode, because the ARM ARM - * puts the operands to a fused mac operation (a*b)+c in the order c,a,b - */ - rule = float_3nan_prop_s_cab; -#elif defined(TARGET_MIPS) +#if defined(TARGET_MIPS) if (snan_bit_is_one(status)) { rule = float_3nan_prop_s_abc; } else { |