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| author | Peter Maydell <peter.maydell@linaro.org> | 2024-12-11 15:30:54 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-12-11 15:30:54 +0000 |
| commit | a71492f7267490e3cc238fa00662d29a0762fd3a (patch) | |
| tree | 48dfa2bef3dc4d880ca2639bf0577302b54dbc7d /fpu/softfloat-specialize.c.inc | |
| parent | 6f759b179fd72a90fed129721dc28e04fa79d7c3 (diff) | |
| download | focaccia-qemu-a71492f7267490e3cc238fa00662d29a0762fd3a.tar.gz focaccia-qemu-a71492f7267490e3cc238fa00662d29a0762fd3a.zip | |
target/mips: Set FloatInfZeroNaNRule explicitly
Set the FloatInfZeroNaNRule explicitly for the MIPS target, so we can remove the ifdef from pickNaNMulAdd(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-9-peter.maydell@linaro.org
Diffstat (limited to 'fpu/softfloat-specialize.c.inc')
| -rw-r--r-- | fpu/softfloat-specialize.c.inc | 16 |
1 files changed, 1 insertions, 15 deletions
diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index 2023b2bd63..db9a466e05 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -489,21 +489,7 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls, /* * Temporarily fall back to ifdef ladder */ -#if defined(TARGET_MIPS) - if (snan_bit_is_one(status)) { - /* - * For MIPS systems that conform to IEEE754-1985, the (inf,zero,nan) - * case sets InvalidOp and returns the default NaN - */ - rule = float_infzeronan_dnan_always; - } else { - /* - * For MIPS systems that conform to IEEE754-2008, the (inf,zero,nan) - * case sets InvalidOp and returns the input value 'c' - */ - rule = float_infzeronan_dnan_never; - } -#elif defined(TARGET_SPARC) || \ +#if defined(TARGET_SPARC) || \ defined(TARGET_XTENSA) || defined(TARGET_HPPA) || \ defined(TARGET_I386) || defined(TARGET_LOONGARCH) /* |