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authorPeter Maydell <peter.maydell@linaro.org>2024-11-05 10:09:53 +0000
committerPeter Maydell <peter.maydell@linaro.org>2024-11-05 10:09:53 +0000
commitd1ff996788a41280e2e0213b9571afeca4d6ca90 (patch)
treed2253df5e538d9731c2056e967b536245b1e0dce /fpu/softfloat-specialize.c.inc
parentd22c9949d73d714e1ea2caf033131d882ad1d66a (diff)
downloadfocaccia-qemu-d1ff996788a41280e2e0213b9571afeca4d6ca90.tar.gz
focaccia-qemu-d1ff996788a41280e2e0213b9571afeca4d6ca90.zip
target/arm: Explicitly set 2-NaN propagation rule
Set the 2-NaN propagation rule explicitly in the float_status words
we use.  We wrap this plus the pre-existing setting of the
tininess-before-rounding flag in a new function
arm_set_default_fp_behaviours() to avoid repetition, since we have a
lot of float_status words at this point.

The situation with FPA11 emulation in linux-user is a little odd, and
arguably "correct" behaviour there would be to exactly match a real
Linux kernel's FPA11 emulation.  However FPA11 emulation is
essentially dead at this point and so it seems better to continue
with QEMU's current behaviour and leave a comment describing the
situation.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20241025141254.2141506-4-peter.maydell@linaro.org
Diffstat (limited to 'fpu/softfloat-specialize.c.inc')
-rw-r--r--fpu/softfloat-specialize.c.inc13
1 files changed, 2 insertions, 11 deletions
diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc
index fae6794a15..70cd3628b5 100644
--- a/fpu/softfloat-specialize.c.inc
+++ b/fpu/softfloat-specialize.c.inc
@@ -402,20 +402,11 @@ static int pickNaN(FloatClass a_cls, FloatClass b_cls,
         /* target didn't set the rule: fall back to old ifdef choices */
 #if defined(TARGET_AVR) || defined(TARGET_HEXAGON) \
     || defined(TARGET_RISCV) || defined(TARGET_SH4) \
-    || defined(TARGET_TRICORE)
+    || defined(TARGET_TRICORE) || defined(TARGET_ARM)
         g_assert_not_reached();
-#elif defined(TARGET_ARM) || defined(TARGET_MIPS) || defined(TARGET_HPPA) || \
+#elif defined(TARGET_MIPS) || defined(TARGET_HPPA) || \
     defined(TARGET_LOONGARCH64) || defined(TARGET_S390X)
         /*
-         * ARM mandated NaN propagation rules (see FPProcessNaNs()), take
-         * the first of:
-         *  1. A if it is signaling
-         *  2. B if it is signaling
-         *  3. A (quiet)
-         *  4. B (quiet)
-         * A signaling NaN is always quietened before returning it.
-         */
-        /*
          * According to MIPS specifications, if one of the two operands is
          * a sNaN, a new qNaN has to be generated. This is done in
          * floatXX_silence_nan(). For qNaN inputs the specifications