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authorPeter Maydell <peter.maydell@linaro.org>2019-03-25 13:31:12 +0000
committerPeter Maydell <peter.maydell@linaro.org>2019-03-25 13:31:13 +0000
commitadb3321bfdeabeeb32b5ec545043a3f5f9fd8a7e (patch)
treeb13a297f6fdd0ec9d6f49a24603d3a9b9edf9db5 /fpu/softfloat.c
parentc442b7b4a7ae8696bcdf46091d781bd9052731be (diff)
parent87db90182060e0fc821a99cbc2cc2f4ebf1b721d (diff)
downloadfocaccia-qemu-adb3321bfdeabeeb32b5ec545043a3f5f9fd8a7e.tar.gz
focaccia-qemu-adb3321bfdeabeeb32b5ec545043a3f5f9fd8a7e.zip
Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-and-fpu-fixes-250319-1' into staging
Mix of testing & fpu fixes

  - more splitting of Travis matric to avoid timeouts
  - Fused Multiply-Add fixes for MIPS and hardfloat
  - cleanups to docker travis emulation

# gpg: Signature made Mon 25 Mar 2019 10:44:44 GMT
# gpg:                using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8  DF35 FBD0 DB09 5A9E 2A44

* remotes/stsquad/tags/pull-testing-and-fpu-fixes-250319-1:
  docker: trivial changes to `make docker` help
  docker: Fix travis script unable to find source dir
  docker: Fix travis.py parser and misc change
  hardfloat: fix float32/64 fused multiply-add
  target/mips: Fix minor bug in FPU
  .travis.yml: reduce number of targets built while disabling things
  .travis.yml: --disable-user for --without-default-devices
  .travis.yml: split some more system builds
  configure: add --target-list-exclude

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'fpu/softfloat.c')
-rw-r--r--fpu/softfloat.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 4610738ab1..2ba36ec370 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -1596,6 +1596,9 @@ float32_muladd(float32 xa, float32 xb, float32 xc, int flags, float_status *s)
         }
         ur.h = up.h + uc.h;
     } else {
+        union_float32 ua_orig = ua;
+        union_float32 uc_orig = uc;
+
         if (flags & float_muladd_negate_product) {
             ua.h = -ua.h;
         }
@@ -1608,6 +1611,8 @@ float32_muladd(float32 xa, float32 xb, float32 xc, int flags, float_status *s)
         if (unlikely(f32_is_inf(ur))) {
             s->float_exception_flags |= float_flag_overflow;
         } else if (unlikely(fabsf(ur.h) <= FLT_MIN)) {
+            ua = ua_orig;
+            uc = uc_orig;
             goto soft;
         }
     }
@@ -1662,6 +1667,9 @@ float64_muladd(float64 xa, float64 xb, float64 xc, int flags, float_status *s)
         }
         ur.h = up.h + uc.h;
     } else {
+        union_float64 ua_orig = ua;
+        union_float64 uc_orig = uc;
+
         if (flags & float_muladd_negate_product) {
             ua.h = -ua.h;
         }
@@ -1674,6 +1682,8 @@ float64_muladd(float64 xa, float64 xb, float64 xc, int flags, float_status *s)
         if (unlikely(f64_is_inf(ur))) {
             s->float_exception_flags |= float_flag_overflow;
         } else if (unlikely(fabs(ur.h) <= FLT_MIN)) {
+            ua = ua_orig;
+            uc = uc_orig;
             goto soft;
         }
     }