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| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2003-06-15 19:49:16 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2003-06-15 19:49:16 +0000 |
| commit | 1e5ffbedded7ded797f5042d82b70109a712b4c0 (patch) | |
| tree | 81042d5ec7ce24421686451530536840f004b0b9 /helper-i386.c | |
| parent | 79638566e5b87058e92f537b989df0dbc23f8b41 (diff) | |
| download | focaccia-qemu-1e5ffbedded7ded797f5042d82b70109a712b4c0.tar.gz focaccia-qemu-1e5ffbedded7ded797f5042d82b70109a712b4c0.zip | |
fixed float to int overflow bug - added ARM host correct roundings for float rounding
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@237 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'helper-i386.c')
| -rw-r--r-- | helper-i386.c | 75 |
1 files changed, 74 insertions, 1 deletions
diff --git a/helper-i386.c b/helper-i386.c index 293d46af80..1182be8ce7 100644 --- a/helper-i386.c +++ b/helper-i386.c @@ -19,6 +19,57 @@ */ #include "exec-i386.h" +const uint8_t parity_table[256] = { + CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, + 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, + 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, + CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, + 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, + CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, + CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, + 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, + 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, + CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, + CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, + 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, + CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, + 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, + 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, + CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, + 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, + CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, + CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, + 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, + CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, + 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, + 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, + CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, + CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, + 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, + 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, + CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, + 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, + CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, + CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, + 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, +}; + +/* modulo 17 table */ +const uint8_t rclw_table[32] = { + 0, 1, 2, 3, 4, 5, 6, 7, + 8, 9,10,11,12,13,14,15, + 16, 0, 1, 2, 3, 4, 5, 6, + 7, 8, 9,10,11,12,13,14, +}; + +/* modulo 9 table */ +const uint8_t rclb_table[32] = { + 0, 1, 2, 3, 4, 5, 6, 7, + 8, 0, 1, 2, 3, 4, 5, 6, + 7, 8, 0, 1, 2, 3, 4, 5, + 6, 7, 8, 0, 1, 2, 3, 4, +}; + const CPU86_LDouble f15rk[7] = { 0.00000000000000000000L, @@ -693,7 +744,29 @@ void helper_fsincos(void) void helper_frndint(void) { - ST0 = rint(ST0); + CPU86_LDouble a; + + a = ST0; +#ifdef __arm__ + switch(env->fpuc & RC_MASK) { + default: + case RC_NEAR: + asm("rndd %0, %1" : "=f" (a) : "f"(a)); + break; + case RC_DOWN: + asm("rnddm %0, %1" : "=f" (a) : "f"(a)); + break; + case RC_UP: + asm("rnddp %0, %1" : "=f" (a) : "f"(a)); + break; + case RC_CHOP: + asm("rnddz %0, %1" : "=f" (a) : "f"(a)); + break; + } +#else + a = rint(a); +#endif + ST0 = a; } void helper_fscale(void) |