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| author | Liu Yi L <yi.l.liu@intel.com> | 2020-07-04 01:07:15 -0700 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2020-07-22 07:57:07 -0400 |
| commit | a4544c45e109ceee87ee8c19baff28be3890d788 (patch) | |
| tree | f5b5eb70e2da31fefede2ccf6e738dfc77bf0af7 /hw/acpi/core.c | |
| parent | 9b3a35ec8236933ab958a4c3ad883163f1ca66e7 (diff) | |
| download | focaccia-qemu-a4544c45e109ceee87ee8c19baff28be3890d788.tar.gz focaccia-qemu-a4544c45e109ceee87ee8c19baff28be3890d788.zip | |
intel_iommu: Use correct shift for 256 bits qi descriptor
In chapter 10.4.23 of VT-d spec 3.0, Descriptor Width bit was introduced in VTD_IQA_REG. Software could set this bit to tell VT-d the QI descriptor from software would be 256 bits. Accordingly, the VTD_IQH_QH_SHIFT should be 5 when descriptor size is 256 bits. This patch adds the DW bit check when deciding the shift used to update VTD_IQH_REG. Signed-off-by: Liu Yi L <yi.l.liu@intel.com> Message-Id: <1593850035-35483-1-git-send-email-yi.l.liu@intel.com> Reviewed-by: Peter Xu <peterx@redhat.com> Acked-by: Jason Wang <jasowang@redhat.com> Cc: qemu-stable@nongnu.org Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/acpi/core.c')
0 files changed, 0 insertions, 0 deletions