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| author | Igor Mammedov <imammedo@redhat.com> | 2014-02-03 11:44:58 +0100 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2014-02-05 16:55:49 +0200 |
| commit | a7b613cf68b65d04ef2b1b601bb18f31e8ca0c11 (patch) | |
| tree | 38d2eb72659774691e06d64be01b0161a613ad9f /hw/acpi/pcihp.c | |
| parent | 8f5001f9ede507940317531bc83154288e7a1d0a (diff) | |
| download | focaccia-qemu-a7b613cf68b65d04ef2b1b601bb18f31e8ca0c11.tar.gz focaccia-qemu-a7b613cf68b65d04ef2b1b601bb18f31e8ca0c11.zip | |
pcihp: make PCI hotplug mmio handlers indifferent to PCI_HOTPLUG_ADDR
... removes dependency of mmio handler on PCI_HOTPLUG_ADDR. It will be needed in case of Q35 where base could be different. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/acpi/pcihp.c')
| -rw-r--r-- | hw/acpi/pcihp.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index 464739aaa1..64c8cf28f1 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -48,11 +48,11 @@ #define PCI_HOTPLUG_ADDR 0xae00 #define PCI_HOTPLUG_SIZE 0x0014 -#define PCI_UP_BASE 0xae00 -#define PCI_DOWN_BASE 0xae04 -#define PCI_EJ_BASE 0xae08 -#define PCI_RMV_BASE 0xae0c -#define PCI_SEL_BASE 0xae10 +#define PCI_UP_BASE 0x0000 +#define PCI_DOWN_BASE 0x0004 +#define PCI_EJ_BASE 0x0008 +#define PCI_RMV_BASE 0x000c +#define PCI_SEL_BASE 0x0010 typedef struct AcpiPciHpFind { int bsel; @@ -213,24 +213,24 @@ static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size) } switch (addr) { - case PCI_UP_BASE - PCI_HOTPLUG_ADDR: + case PCI_UP_BASE: val = s->acpi_pcihp_pci_status[bsel].up; s->acpi_pcihp_pci_status[bsel].up = 0; ACPI_PCIHP_DPRINTF("pci_up_read %" PRIu32 "\n", val); break; - case PCI_DOWN_BASE - PCI_HOTPLUG_ADDR: + case PCI_DOWN_BASE: val = s->acpi_pcihp_pci_status[bsel].down; ACPI_PCIHP_DPRINTF("pci_down_read %" PRIu32 "\n", val); break; - case PCI_EJ_BASE - PCI_HOTPLUG_ADDR: + case PCI_EJ_BASE: /* No feature defined yet */ ACPI_PCIHP_DPRINTF("pci_features_read %" PRIu32 "\n", val); break; - case PCI_RMV_BASE - PCI_HOTPLUG_ADDR: + case PCI_RMV_BASE: val = s->acpi_pcihp_pci_status[bsel].hotplug_enable; ACPI_PCIHP_DPRINTF("pci_rmv_read %" PRIu32 "\n", val); break; - case PCI_SEL_BASE - PCI_HOTPLUG_ADDR: + case PCI_SEL_BASE: val = s->hotplug_select; ACPI_PCIHP_DPRINTF("pci_sel_read %" PRIu32 "\n", val); default: @@ -245,7 +245,7 @@ static void pci_write(void *opaque, hwaddr addr, uint64_t data, { AcpiPciHpState *s = opaque; switch (addr) { - case PCI_EJ_BASE - PCI_HOTPLUG_ADDR: + case PCI_EJ_BASE: if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) { break; } @@ -253,7 +253,7 @@ static void pci_write(void *opaque, hwaddr addr, uint64_t data, ACPI_PCIHP_DPRINTF("pciej write %" HWADDR_PRIx " <== %" PRIu64 "\n", addr, data); break; - case PCI_SEL_BASE - PCI_HOTPLUG_ADDR: + case PCI_SEL_BASE: s->hotplug_select = data; ACPI_PCIHP_DPRINTF("pcisel write %" HWADDR_PRIx " <== %" PRIu64 "\n", addr, data); |